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[80.187.113.102]) by smtp.gmail.com with ESMTPSA id r25-20020a170906351900b00a1cc1be1146sm1096114eja.217.2023.12.08.07.08.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 07:08:56 -0800 (PST) From: Luca Weiss Date: Fri, 08 Dec 2023 16:08:00 +0100 Subject: [PATCH v3 04/11] arm64: dts: qcom: sc7280*: move MPSS and WPSS memory to dtsi Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231208-sc7280-remoteprocs-v3-4-6aa394d33edf@fairphone.com> References: <20231208-sc7280-remoteprocs-v3-0-6aa394d33edf@fairphone.com> In-Reply-To: <20231208-sc7280-remoteprocs-v3-0-6aa394d33edf@fairphone.com> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , cros-qcom-dts-watchers@chromium.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , =?utf-8?q?Matti_Lehtim=C3=A4ki?= , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.12.4 It appears that all SC7280-based devices so far have mpss_mem and wpss_mem on the same reg with the same size. Also these memory regions are referenced already in sc7280.dtsi so that's where they should also be defined. Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts | 10 ---------- arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi | 5 ----- arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi | 5 ----- arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi | 1 + arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++++++ 5 files changed, 11 insertions(+), 20 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts index de49bb11f3c7..10f4c75aed3f 100644 --- a/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts +++ b/arch/arm64/boot/dts/qcom/qcm6490-fairphone-fp5.dts @@ -87,16 +87,6 @@ cdsp_mem: cdsp@88f00000 { no-map; }; - mpss_mem: mpss@8b800000 { - reg = <0x0 0x8b800000 0x0 0xf600000>; - no-map; - }; - - wpss_mem: wpss@9ae00000 { - reg = <0x0 0x9ae00000 0x0 0x1900000>; - no-map; - }; - rmtfs_mem: memory@f8500000 { compatible = "qcom,rmtfs-mem"; reg = <0x0 0xf8500000 0x0 0x600000>; diff --git a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi index 186aa82ce662..fd3ff576d1fc 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi @@ -40,11 +40,6 @@ venus_mem: memory@8b200000 { reg = <0x0 0x8b200000 0x0 0x500000>; no-map; }; - - wpss_mem: memory@9ae00000 { - reg = <0x0 0x9ae00000 0x0 0x1900000>; - no-map; - }; }; }; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi index 203274c10532..b721a8546800 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi @@ -8,11 +8,6 @@ / { reserved-memory { - mpss_mem: memory@8b800000 { - reg = <0x0 0x8b800000 0x0 0xf600000>; - no-map; - }; - mba_mem: memory@9c700000 { reg = <0x0 0x9c700000 0x0 0x200000>; no-map; diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi index 2febd6126d4c..3ebc915f0dc2 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine-wifi-sku.dtsi @@ -7,5 +7,6 @@ /* WIFI SKUs save 256M by not having modem/mba/rmtfs memory regions defined. */ +/delete-node/ &mpss_mem; /delete-node/ &remoteproc_mpss; /delete-node/ &rmtfs_mem; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index f4d02d9dcb55..221ab163c8ad 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -158,6 +158,16 @@ gpu_zap_mem: zap@8b71a000 { no-map; }; + mpss_mem: mpss@8b800000 { + reg = <0x0 0x8b800000 0x0 0xf600000>; + no-map; + }; + + wpss_mem: wpss@9ae00000 { + reg = <0x0 0x9ae00000 0x0 0x1900000>; + no-map; + }; + rmtfs_mem: rmtfs@9c900000 { compatible = "qcom,rmtfs-mem"; reg = <0x0 0x9c900000 0x0 0x280000>;