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[178.235.179.206]) by smtp.gmail.com with ESMTPSA id i11-20020a170906250b00b00a233a4c4a30sm3782036ejb.90.2023.12.19.10.55.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 10:55:39 -0800 (PST) From: Konrad Dybcio Date: Tue, 19 Dec 2023 19:55:33 +0100 Subject: [PATCH 2/2] clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231219-topic-8650_clks-v1-2-5672bfa0eb05@linaro.org> References: <20231219-topic-8650_clks-v1-0-5672bfa0eb05@linaro.org> In-Reply-To: <20231219-topic-8650_clks-v1-0-5672bfa0eb05@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Neil Armstrong Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1703012135; l=1273; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=d7fTpCN4ELYmAt8UhLatNQ/qPqyouKJJXysPr29VFl0=; b=8O8AGQiz0WxOOgxa7fj9mAdAH4cucKoA9J7GY+kydWFn/ORlgixUqp4DgkgF45Zches7/P2WI JI9Qn0MW3G0BflhUAbFNCKIr37Rkbvohz2aZCx1gzn8bwT2Ngv7Ri/a X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= These values were missing. Add them. Fixes: 9e939f008338 ("clk: qcom: add the SM8650 Display Clock Controller driver") Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/dispcc-sm8650.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm8650.c b/drivers/clk/qcom/dispcc-sm8650.c index 6283099faf57..f3b1d9d16bae 100644 --- a/drivers/clk/qcom/dispcc-sm8650.c +++ b/drivers/clk/qcom/dispcc-sm8650.c @@ -79,6 +79,10 @@ static const struct alpha_pll_config disp_cc_pll0_config = { .config_ctl_val = 0x20485699, .config_ctl_hi_val = 0x00182261, .config_ctl_hi1_val = 0x82aa299c, + .test_ctl_val = 0x00000000, + .test_ctl_hi_val = 0x00000003, + .test_ctl_hi1_val = 0x00009000, + .test_ctl_hi2_val = 0x00000034, .user_ctl_val = 0x00000000, .user_ctl_hi_val = 0x00000005, }; @@ -106,6 +110,10 @@ static const struct alpha_pll_config disp_cc_pll1_config = { .config_ctl_val = 0x20485699, .config_ctl_hi_val = 0x00182261, .config_ctl_hi1_val = 0x82aa299c, + .test_ctl_val = 0x00000000, + .test_ctl_hi_val = 0x00000003, + .test_ctl_hi1_val = 0x00009000, + .test_ctl_hi2_val = 0x00000034, .user_ctl_val = 0x00000000, .user_ctl_hi_val = 0x00000005, };