From patchwork Sat Feb 3 02:36:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wesley Cheng X-Patchwork-Id: 769586 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A3E979FE; Sat, 3 Feb 2024 02:37:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706927870; cv=none; b=kDW7D9et8XTnPzywHutd5dtDf6QFlVvp+kxRPi4XV248GQxoWZdzhHeBMacNd4eIEAuCIHKI3JKEsvHfl8zVxchPtSrbRAdQ8BuaDc1uQ5N/xoIqk/6eXcMMqG0u0+10wRJMFcGlUW1yGZxM6asfv8SwbDwyM1KTDLxrE9+hF/8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706927870; c=relaxed/simple; bh=ymj30Zx1dbYTRAyB5Kax/JPfqIskBJp3/VM40Po124I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mdUwU8IAn7+WTKE0Pttiicy1ZGBWBB/agtdXzq1qSb4G8/xp+tyfWAdm7eft/m8PhRTmeMGD2iqMdl3Q+SlPNcecfh6YzUjdVq5EAng/voCqm8Y7mC1mK9sxdBewaqSjss7R1L8DYecz8vFwfjZDNtUSRLxsDC2wOPVJNrI9zKA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=j+O4GbZx; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="j+O4GbZx" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 4132bRU1029929; Sat, 3 Feb 2024 02:37:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=8G+8heZ1+RWqkfMIHEmo ONeKrV6MuHsqsw1D8O8H9Qk=; b=j+O4GbZxJSzPbX/+uL7RbvoFei0NICecRRRS H0XtRkBC4Q1A44MkPnIa/zgiTORJVQAdBVgFmHipVbp1JUECA4ioTBOSVyk9y/o/ fXKdw+60N+mgI96o/Qh84PCbYiGTiqq/qTJfD3s82MK0AycUdDj2W4lO1g1GOWQN mjhB74epKLooCUyw+6vKEES8HvHVy178mPy3xQZxBmcpMUtDxErNwtx8UPjfX2cc rcCAWQpG5VzKmpwxRBkJ6op8Zk5JXlCJvqAfpyCGK3lsPpSpFwejPiGDjTbl5i8Y bU+oaFT0wDvhbVGbPjS3nYO5kAjZsU8LzrFerDzlQ73fZzsU/Q== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3w0ptwawrd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 03 Feb 2024 02:37:27 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 4132bQLv024776 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 3 Feb 2024 02:37:26 GMT Received: from hu-wcheng-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 2 Feb 2024 18:37:25 -0800 From: Wesley Cheng To: , , , , , , , , , , , , , , CC: , , , , , , , Wesley Cheng Subject: [PATCH v13 29/53] usb: host: xhci-plat: Set XHCI max interrupters if property is present Date: Fri, 2 Feb 2024 18:36:21 -0800 Message-ID: <20240203023645.31105-30-quic_wcheng@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240203023645.31105-1-quic_wcheng@quicinc.com> References: <20240203023645.31105-1-quic_wcheng@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: IDmQz6v3apxLqECWv7oYngp31ibqTsB_ X-Proofpoint-GUID: IDmQz6v3apxLqECWv7oYngp31ibqTsB_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-02_16,2024-01-31_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 malwarescore=0 mlxscore=0 lowpriorityscore=0 phishscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 impostorscore=0 suspectscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401310000 definitions=main-2402030015 Some platforms may want to limit the number of XHCI interrupters allocated. This is passed to xhci-plat as a device property. Ensure that this is read and the max_interrupters field is set. Signed-off-by: Wesley Cheng --- drivers/usb/host/xhci-plat.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index f04fde19f551..54719f473130 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -255,6 +255,8 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); + device_property_read_u16(tmpdev, "num-hc-interrupters", + &xhci->max_interrupters); } /*