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Wed, 1 May 2024 08:32:37 GMT Received: from hu-skakitap-hyd.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 1 May 2024 01:32:33 -0700 From: Satya Priya Kakitapalli Date: Wed, 1 May 2024 14:02:19 +0530 Subject: [PATCH v3 2/2] arm64: dts: qcom: sm8150: Add video clock controller node Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240501-videocc-sm8150-dt-node-v3-2-2c4bd9ef48bd@quicinc.com> References: <20240501-videocc-sm8150-dt-node-v3-0-2c4bd9ef48bd@quicinc.com> In-Reply-To: <20240501-videocc-sm8150-dt-node-v3-0-2c4bd9ef48bd@quicinc.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Michael Turquette , "Stephen Boyd" CC: Dmitry Baryshkov , Ajit Pandey , Imran Shaik , "Taniya Das" , Jagadeesh Kona , , , , , "Satya Priya Kakitapalli" X-Mailer: b4 0.12.4 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: AJqPRkw9mEaCrmfIZTI2fHNEVg-Mkv0z X-Proofpoint-GUID: AJqPRkw9mEaCrmfIZTI2fHNEVg-Mkv0z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1011,Hydra:6.0.650,FMLib:17.11.176.26 definitions=2024-05-01_08,2024-04-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 impostorscore=0 bulkscore=0 phishscore=0 mlxlogscore=938 priorityscore=1501 clxscore=1015 mlxscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2404010003 definitions=main-2405010059 Add device node for video clock controller on Qualcomm SM8150 platform. Signed-off-by: Satya Priya Kakitapalli --- arch/arm64/boot/dts/qcom/sa8155p.dtsi | 4 ++++ arch/arm64/boot/dts/qcom/sm8150.dtsi | 14 ++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sa8155p.dtsi b/arch/arm64/boot/dts/qcom/sa8155p.dtsi index ffb7ab695213..9e70effc72e1 100644 --- a/arch/arm64/boot/dts/qcom/sa8155p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8155p.dtsi @@ -38,3 +38,7 @@ &rpmhpd { */ compatible = "qcom,sa8155p-rpmhpd"; }; + +&videocc { + power-domains = <&rpmhpd SA8155P_CX>; +}; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index a35c0852b5a1..55c9046f4fb9 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -3715,6 +3716,19 @@ usb_2_dwc3: usb@a800000 { }; }; + videocc: clock-controller@ab00000 { + compatible = "qcom,sm8150-videocc"; + reg = <0 0x0ab00000 0 0x10000>; + clocks = <&gcc GCC_VIDEO_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "bi_tcxo"; + power-domains = <&rpmhpd SM8150_MMCX>; + required-opps = <&rpmhpd_opp_low_svs>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + camnoc_virt: interconnect@ac00000 { compatible = "qcom,sm8150-camnoc-virt"; reg = <0 0x0ac00000 0 0x1000>;