diff mbox series

[03/13] clk: qcom: gcc-sa8775p: Set FORCE_MEM_CORE_ON for gcc_ufs_phy_ice_core_clk

Message ID 20240531090249.10293-4-quic_tdas@quicinc.com
State Superseded
Headers show
Series Add support for SA8775P Multimedia clock controllers | expand

Commit Message

Taniya Das May 31, 2024, 9:02 a.m. UTC 
Set FORCE_MEM_CORE_ON bit for gcc_ufs_phy_ice_core_clk.

Fixes: 08c51ceb12f7 ("clk: qcom: add the GCC driver for sa8775p")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
---
 drivers/clk/qcom/gcc-sa8775p.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-sa8775p.c b/drivers/clk/qcom/gcc-sa8775p.c
index 71fa95f59a0a..23b5207dc606 100644
--- a/drivers/clk/qcom/gcc-sa8775p.c
+++ b/drivers/clk/qcom/gcc-sa8775p.c
@@ -4686,6 +4686,9 @@  static int gcc_sa8775p_probe(struct platform_device *pdev)
 	qcom_branch_set_clk_en(regmap, 0x34004); /* GCC_VIDEO_AHB_CLK */
 	qcom_branch_set_clk_en(regmap, 0x34024); /* GCC_VIDEO_XO_CLK */
 
+	/* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
+	qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
+
 	return qcom_cc_really_probe(pdev, &gcc_sa8775p_desc, regmap);
 }