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[24.150.219.207]) by smtp.gmail.com with ESMTPSA id af79cd13be357-798aaecc004sm432892285a.31.2024.06.17.06.50.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jun 2024 06:50:42 -0700 (PDT) From: Trevor Gamblin Date: Mon, 17 Jun 2024 09:50:07 -0400 Subject: [PATCH v3 27/41] iio: imu: inv_icm42600: make use of regmap_clear_bits(), regmap_set_bits() Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240617-review-v3-27-88d1338c4cca@baylibre.com> References: <20240617-review-v3-0-88d1338c4cca@baylibre.com> In-Reply-To: <20240617-review-v3-0-88d1338c4cca@baylibre.com> To: Jonathan Cameron , Lars-Peter Clausen , Dmitry Rokosov , Michael Hennerich , Cosmin Tanislav , Chen-Yu Tsai , Hans de Goede , Ray Jui , Scott Branden , Broadcom internal kernel review list , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Saravanan Sekar , Orson Zhai , Baolin Wang , Chunyan Zhang , Maxime Coquelin , Alexandre Torgue , =?utf-8?q?Nuno_S=C3=A1?= , Linus Walleij , Jean-Baptiste Maneyrol , Crt Mori Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-amlogic@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Trevor Gamblin X-Mailer: b4 0.13.0 Instead of using regmap_update_bits() and passing the mask twice, use regmap_set_bits(). Instead of using regmap_update_bits() and passing val = 0, use regmap_clear_bits(). Suggested-by: Uwe Kleine-König Signed-off-by: Trevor Gamblin --- drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c | 14 ++++++-------- drivers/iio/imu/inv_icm42600/inv_icm42600_core.c | 9 ++++----- drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c | 4 ++-- drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c | 4 ++-- 4 files changed, 14 insertions(+), 17 deletions(-) diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c index 63b85ec88c13..509fe6a3ae97 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c @@ -262,9 +262,8 @@ int inv_icm42600_buffer_update_watermark(struct inv_icm42600_state *st) /* restore watermark interrupt */ if (restore) { - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, - INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, - INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); + ret = regmap_set_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); if (ret) return ret; } @@ -306,9 +305,8 @@ static int inv_icm42600_buffer_postenable(struct iio_dev *indio_dev) } /* set FIFO threshold interrupt */ - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, - INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, - INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); + ret = regmap_set_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); if (ret) goto out_unlock; @@ -363,8 +361,8 @@ static int inv_icm42600_buffer_predisable(struct iio_dev *indio_dev) goto out_unlock; /* disable FIFO threshold interrupt */ - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, - INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN, 0); + ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_SOURCE0, + INV_ICM42600_INT_SOURCE0_FIFO_THS_INT1_EN); if (ret) goto out_unlock; diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c index 96116a68ab29..bb302f5540cf 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c @@ -435,9 +435,8 @@ static int inv_icm42600_setup(struct inv_icm42600_state *st, return ret; /* sensor data in big-endian (default) */ - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, - INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN, - INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN); + ret = regmap_set_bits(st->map, INV_ICM42600_REG_INTF_CONFIG0, + INV_ICM42600_INTF_CONFIG0_SENSOR_DATA_ENDIAN); if (ret) return ret; @@ -532,8 +531,8 @@ static int inv_icm42600_irq_init(struct inv_icm42600_state *st, int irq, return ret; /* Deassert async reset for proper INT pin operation (cf datasheet) */ - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INT_CONFIG1, - INV_ICM42600_INT_CONFIG1_ASYNC_RESET, 0); + ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INT_CONFIG1, + INV_ICM42600_INT_CONFIG1_ASYNC_RESET); if (ret) return ret; diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c index 8d33504d770f..ebb31b385881 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_i2c.c @@ -28,8 +28,8 @@ static int inv_icm42600_i2c_bus_setup(struct inv_icm42600_state *st) INV_ICM42600_INTF_CONFIG6_MASK, INV_ICM42600_INTF_CONFIG6_I3C_EN); - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, - INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0); + ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, + INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY); if (ret) return ret; diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c index cc2bf1799a46..eae5ff7a3cc1 100644 --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c @@ -27,8 +27,8 @@ static int inv_icm42600_spi_bus_setup(struct inv_icm42600_state *st) if (ret) return ret; - ret = regmap_update_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, - INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY, 0); + ret = regmap_clear_bits(st->map, INV_ICM42600_REG_INTF_CONFIG4, + INV_ICM42600_INTF_CONFIG4_I3C_BUS_ONLY); if (ret) return ret;