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Sat, 22 Jun 2024 15:02:21 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ec55e56ea5sm2502051fa.112.2024.06.22.15.02.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 22 Jun 2024 15:02:21 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 23 Jun 2024 01:02:17 +0300 Subject: [PATCH v3 04/13] drm/msm/hdmi: drop clock frequency assignment Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240623-fd-hdmi-hpd-v3-4-8645a64cbd63@linaro.org> References: <20240623-fd-hdmi-hpd-v3-0-8645a64cbd63@linaro.org> In-Reply-To: <20240623-fd-hdmi-hpd-v3-0-8645a64cbd63@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Jessica Zhang X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2350; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=/H9AIeRGXj1iPiMEVlXfEy/zaUhCvcXeyC4fw6d5vqM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmd0noU4Zk6ai+BqxKLQv+DuZB+HcLkitfG198w TKh43wQY+mJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZndJ6AAKCRCLPIo+Aiko 1XFTCACCZWRtDa5j3veTt161Zzru2wbC1iIJaNc44Trwd8tq0lKZPNaJtAbeZFP22J2h8xrUaYp LT4OKi/B1z2c5RvUzdMh4lnE9mumYKIvvIndLML9nDw8b4Zykw1kSnJMS/aOk7QqZqRxnuZUhS/ mzdPf07mi6DNoOsX1SMaIDRuCZG0Nprsl1+Vh0OGmzawZtVT5ysQtnvykWHr67OohWaJJ7afXqh aSNhYQILCJChPwf6hmk19Cgpg8cpFJsPcOeqIDSar+FkOdOjxzUSTUDAnBym5kh7swsh6Nt0KVy Ml6vk1OxPM86QTaOSHPgXlR9JqC/l8XWsNEfzLKpvxIYAN4V X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The only clock which has frequency being set through hpd_freqs is the "core" aka MDSS_HDMI_CLK clock. It always has the specified frequency, so we can drop corresponding clk_set_rate() call together with the hpd_freq infrastructure. Reviewed-by: Jessica Zhang Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/hdmi/hdmi.c | 2 -- drivers/gpu/drm/msm/hdmi/hdmi.h | 1 - drivers/gpu/drm/msm/hdmi/hdmi_hpd.c | 9 --------- 3 files changed, 12 deletions(-) diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.c b/drivers/gpu/drm/msm/hdmi/hdmi.c index 3a65d82cedc7..9a39ad1847b9 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi.c @@ -235,12 +235,10 @@ static const struct hdmi_platform_config hdmi_tx_8960_config = { static const char *pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"}; static const char *hpd_clk_names_8x74[] = {"iface", "core", "mdp_core", "alt_iface"}; -static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0, 0}; static const struct hdmi_platform_config hdmi_tx_8974_config = { HDMI_CFG(pwr_reg, 8x74), HDMI_CFG(hpd_clk, 8x74), - .hpd_freq = hpd_clk_freq_8x74, }; /* diff --git a/drivers/gpu/drm/msm/hdmi/hdmi.h b/drivers/gpu/drm/msm/hdmi/hdmi.h index 1f8c5045a78c..14472b2d6229 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi.h +++ b/drivers/gpu/drm/msm/hdmi/hdmi.h @@ -94,7 +94,6 @@ struct hdmi_platform_config { /* clks that need to be on for hpd: */ const char **hpd_clk_names; - const long unsigned *hpd_freq; int hpd_clk_cnt; }; diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c b/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c index 9ce0ffa35417..7ae69b14e953 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_hpd.c @@ -68,15 +68,6 @@ static void enable_hpd_clocks(struct hdmi *hdmi, bool enable) if (enable) { for (i = 0; i < config->hpd_clk_cnt; i++) { - if (config->hpd_freq && config->hpd_freq[i]) { - ret = clk_set_rate(hdmi->hpd_clks[i], - config->hpd_freq[i]); - if (ret) - dev_warn(dev, - "failed to set clk %s (%d)\n", - config->hpd_clk_names[i], ret); - } - ret = clk_prepare_enable(hdmi->hpd_clks[i]); if (ret) { DRM_DEV_ERROR(dev,