| Message ID | 20241019-sar2130p-llcc-v1-1-4e09063d04f2@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | soc: qcom: llcc: add support for SAR2130P and SAR1130P platforms | expand |
On Sat, Oct 19, 2024 at 07:26:41PM +0300, Dmitry Baryshkov wrote: > Describe the last level cache controller on the SAR2130P and SAR1130P > platforms. They have 2 banks and also a separate register set to control > scratchpad slice. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > .../devicetree/bindings/cache/qcom,llcc.yaml | 28 ++++++++++++++++++++++ > 1 file changed, 28 insertions(+) Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 68ea5f70b75f031cd8b23cf48d566c3a760dab77..2edacf28944c78b53b51744d787f5d529ad83f3c 100644 --- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -22,6 +22,8 @@ properties: enum: - qcom,qdu1000-llcc - qcom,sa8775p-llcc + - qcom,sar1130p-llcc + - qcom,sar2130p-llcc - qcom,sc7180-llcc - qcom,sc7280-llcc - qcom,sc8180x-llcc @@ -62,6 +64,32 @@ required: - reg-names allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,sar1130p-llcc + - qcom,sar2130p-llcc + then: + properties: + reg: + items: + - description: LLCC0 base register region + - description: LLCC1 base register region + - description: LLCC broadcast OR register region + - description: LLCC broadcast AND register region + - description: LLCC scratchpad broadcast OR register region + - description: LLCC scratchpad broadcast AND register region + reg-names: + items: + - const: llcc0_base + - const: llcc1_base + - const: llcc_broadcast_base + - const: llcc_broadcast_and_base + - const: llcc_scratchpad_broadcast_base + - const: llcc_scratchpad_broadcast_and_base + - if: properties: compatible:
Describe the last level cache controller on the SAR2130P and SAR1130P platforms. They have 2 banks and also a separate register set to control scratchpad slice. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../devicetree/bindings/cache/qcom,llcc.yaml | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+)