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Tue, 15 Apr 2025 07:28:37 GMT Received: from hu-kaushalk-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 15 Apr 2025 00:28:32 -0700 From: Kaushal Kumar To: , , , , , , , , , , CC: , , , , , Kaushal Kumar Subject: [PATCH v2 1/5] dt-bindings: mtd: qcom, nandc: Document the SDX75 NAND controller Date: Tue, 15 Apr 2025 12:57:52 +0530 Message-ID: <20250415072756.20046-2-quic_kaushalk@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250415072756.20046-1-quic_kaushalk@quicinc.com> References: <20250415072756.20046-1-quic_kaushalk@quicinc.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=E9TNpbdl c=1 sm=1 tr=0 ts=67fe0aa6 cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=XR8D0OoHHMoA:10 a=COk6AnOGAAAA:8 a=gQ9Sc5ERrPajg2iT2GcA:9 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: YPMQ8t5MUU92MFmj40rAdGishOCRq2y5 X-Proofpoint-GUID: YPMQ8t5MUU92MFmj40rAdGishOCRq2y5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1095,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-04-15_03,2025-04-10_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 adultscore=0 mlxscore=0 bulkscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 impostorscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2502280000 definitions=main-2504150050 Add new compatible for the QPIC NAND controller v2.1.1 used for SDX75 SoC. SDX75 NAND controller has iommu support so define it in the properties section. Signed-off-by: Kaushal Kumar --- .../devicetree/bindings/mtd/qcom,nandc.yaml | 30 +++++++++++++++---- 1 file changed, 24 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml index 35b4206ea918..5511389960f0 100644 --- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml +++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml @@ -11,12 +11,18 @@ maintainers: properties: compatible: - enum: - - qcom,ipq806x-nand - - qcom,ipq4019-nand - - qcom,ipq6018-nand - - qcom,ipq8074-nand - - qcom,sdx55-nand + oneOf: + - items: + - enum: + - qcom,sdx75-nand + - const: qcom,sdx55-nand + - items: + - enum: + - qcom,ipq806x-nand + - qcom,ipq4019-nand + - qcom,ipq6018-nand + - qcom,ipq8074-nand + - qcom,sdx55-nand reg: maxItems: 1 @@ -95,6 +101,18 @@ allOf: items: - const: rxtx + - if: + properties: + compatible: + contains: + enum: + - qcom,sdx75-nand + + then: + properties: + iommus: + maxItems: 1 + - if: properties: compatible: