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Fri, 18 Apr 2025 11:50:27 GMT Received: from [10.213.96.82] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Fri, 18 Apr 2025 04:50:25 -0700 From: Vivek Pernamitta Date: Fri, 18 Apr 2025 17:20:15 +0530 Subject: [PATCH v2] bus: mhi: host: pci: Disable runtime PM for QDU100 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20250418-vdev_next-20250411_pm_disable-v2-1-27dd8d433f3b@quicinc.com> X-B4-Tracking: v=1; b=H4sIAHY8AmgC/42NQQ6CMBBFr0JmbQ0tFKIr7mEIqe0ok0iLLTYY0 rtbiQdw85P3Fu9vENATBjgXG3iMFMjZDOJQgB6VvSMjkxlEKWRZ85pFg3GwuC7sp/gwT4OhoK4 PZLIyErnSppYIuTF7vNG69y995pHC4vx7v4v8a/8tR844w1NTNW2bR6vu+SJNVh+1m6BPKX0AP otPYMwAAAA= X-Change-ID: 20250414-vdev_next-20250411_pm_disable-53d5e1acd45e To: Manivannan Sadhasivam CC: , , , Vivek Pernamitta X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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It is essential to disable runtime PM if the device does not support Low Power Mode (LPM). Signed-off-by: Vivek Pernamitta --- Changes in v2: - Updated device from getting runtime suspended by avoid skipping autosuspend. - Updated commit message. - Link to v1: https://lore.kernel.org/r/20250414-vdev_next-20250411_pm_disable-v1-1-e963677636ca@quicinc.com --- drivers/bus/mhi/host/pci_generic.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) --- base-commit: 01c6df60d5d4ae00cd5c1648818744838bba7763 change-id: 20250414-vdev_next-20250411_pm_disable-53d5e1acd45e Best regards, diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c index 03aa887952098661a488650053a357f883d1559b..bec1ca17ad69ac89e2ea9142024fef8bded258b6 100644 --- a/drivers/bus/mhi/host/pci_generic.c +++ b/drivers/bus/mhi/host/pci_generic.c @@ -43,6 +43,7 @@ * @mru_default: default MRU size for MBIM network packets * @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead * of inband wake support (such as sdx24) + * @pm_disable: disables runtime PM (optional) */ struct mhi_pci_dev_info { const struct mhi_controller_config *config; @@ -54,6 +55,7 @@ struct mhi_pci_dev_info { unsigned int dma_data_width; unsigned int mru_default; bool sideband_wake; + bool pm_disable; }; #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \ @@ -295,6 +297,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = { .bar_num = MHI_PCI_DEFAULT_BAR_NUM, .dma_data_width = 32, .sideband_wake = false, + .pm_disable = true, }; static const struct mhi_channel_config mhi_qcom_sa8775p_channels[] = { @@ -1270,8 +1273,11 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) /* start health check */ mod_timer(&mhi_pdev->health_check_timer, jiffies + HEALTH_CHECK_PERIOD); - /* Only allow runtime-suspend if PME capable (for wakeup) */ - if (pci_pme_capable(pdev, PCI_D3hot)) { + /** + * Disable Runtime PM if device doesn't support MHI M3 state + * and Allow runtime-suspend if PME capable (for wakeup) + */ + if (pci_pme_capable(pdev, PCI_D3hot) && !(info->pm_disable)) { pm_runtime_set_autosuspend_delay(&pdev->dev, 2000); pm_runtime_use_autosuspend(&pdev->dev); pm_runtime_mark_last_busy(&pdev->dev);