From patchwork Sun Jun 21 14:56:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Horia Geanta X-Patchwork-Id: 197619 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13FF5C433E1 for ; Sun, 21 Jun 2020 14:57:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E546C2472E for ; Sun, 21 Jun 2020 14:57:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730264AbgFUO5S (ORCPT ); Sun, 21 Jun 2020 10:57:18 -0400 Received: from inva020.nxp.com ([92.121.34.13]:53568 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730154AbgFUO5R (ORCPT ); Sun, 21 Jun 2020 10:57:17 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 05E361A074B; Sun, 21 Jun 2020 16:57:16 +0200 (CEST) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id ECF721A0744; Sun, 21 Jun 2020 16:57:15 +0200 (CEST) Received: from fsr-ub1864-014.ea.freescale.net (fsr-ub1864-014.ea.freescale.net [10.171.95.219]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 44338203C2; Sun, 21 Jun 2020 16:57:15 +0200 (CEST) From: =?utf-8?q?Horia_Geant=C4=83?= To: Rob Herring , Shawn Guo , Sascha Hauer , Matt Mackall , Herbert Xu Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Arnd Bergmann , Greg Kroah-Hartman , Martin Kaiser , Franck Lenormand , Iuliana Prodan , Silvano Di Ninno , linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/5] hwrng: add support for i.MX6 rngb Date: Sun, 21 Jun 2020 17:56:53 +0300 Message-Id: <20200621145658.12528-1-horia.geanta@nxp.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org Add support for RNGB found in some i.MX6 SoCs (6SL, 6SLL, 6ULL, 6ULZ), based on RNGC driver (drivers/char/hw_random/imx-rngc.c). This driver claims support also for RNGB (besides RNGC), and is currently used only by i.MX25. Note: Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020) also have a RNGB, however it's part of the CAAM (Cryptograhic Accelerator and Assurance Module) crypto accelerator. In this case, RNGB is managed in the caam driver (drivers/crypto/caam/), since it's tightly related to the caam "job ring" interface, not to mention CAAM internally relying on RNGB as source of randomness. On the other hand, the i.MX6 SoCs with RNGB have a DCP (Data Co-Processor) crypto accelerator and this block and RNGB are independent. Changelog: -update rngb DT binding with compatible strings for i.MX6 SoCs Horia Geantă (5): dt-bindings: rng: add Freescale RNGB compatibles for i.MX6 SoCs ARM: dts: imx6sl: fix rng node ARM: dts: imx6sll: add rng ARM: dts: imx6ull: add rng hwrng: imx-rngc: enable driver for i.MX6 Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++ arch/arm/boot/dts/imx6sl.dtsi | 2 ++ arch/arm/boot/dts/imx6sll.dtsi | 7 +++++++ arch/arm/boot/dts/imx6ull.dtsi | 7 +++++++ drivers/char/hw_random/Kconfig | 2 +- drivers/char/hw_random/imx-rngc.c | 3 +++ 6 files changed, 23 insertions(+), 1 deletion(-)