From patchwork Thu Jun 15 09:04:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damian Muszynski X-Patchwork-Id: 693319 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AA32EB64D9 for ; Thu, 15 Jun 2023 09:17:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240422AbjFOJRV (ORCPT ); Thu, 15 Jun 2023 05:17:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52268 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238942AbjFOJRU (ORCPT ); Thu, 15 Jun 2023 05:17:20 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A70B61FFF for ; Thu, 15 Jun 2023 02:17:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686820635; x=1718356635; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=+102agyAT071SQItX3BAM1KckZ5MVn/E/jFwivIKVAA=; b=Voy/csoX3eHS6fxOr77ZBzSVygCjeTemkv5yr0Zwlx+0ST3HpGa6OU2N /Bmr0cjcf/N5/bGOdAWEnaWQ4v2Ek4m0o3kI3Ji9nFd2zbnG3cn54avEb 3CYSQ5kQKLT5EkzqphP2scPAjDoX8exK16gThVmz3aWM3qtWtbQzUgoVT jP8mgmlUIi5E5YySiMlO51YVYNSGx8yBXXAQpjxbfYwZEMKiLC3jxupHL jggcVyRx5WANYt7G4rl8FfNeTic93hAiKN0VPH5g/J2a/BjcuCFGUq1Qt je+ooykLmGop97KgI5SSnp1kJUhafQbMVIeFpO3HARPyuoEU2/h96FxQr w==; X-IronPort-AV: E=McAfee;i="6600,9927,10741"; a="356350644" X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="356350644" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2023 02:17:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10741"; a="782456103" X-IronPort-AV: E=Sophos;i="6.00,244,1681196400"; d="scan'208";a="782456103" Received: from r031s002_zp31l10c01.gv.intel.com (HELO localhost.localdomain) ([10.219.171.29]) by fmsmga004.fm.intel.com with ESMTP; 15 Jun 2023 02:17:14 -0700 From: Damian Muszynski To: herbert@gondor.apana.org.au Cc: linux-crypto@vger.kernel.org, qat-linux@intel.com, Damian Muszynski , Giovanni Cabiddu , Andy Shevchenko Subject: [PATCH 0/4] crypto: qat - add heartbeat feature Date: Thu, 15 Jun 2023 11:04:33 +0200 Message-Id: <20230615090437.436796-1-damian.muszynski@intel.com> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org This set introduces support for the QAT heartbeat feature. It allows detection whenever device firmware or acceleration unit will hang. We're adding this feature to allow our clients having a tool with they could verify if all of the Quick Assist hardware resources are healthy and operational. QAT device firmware periodically writes counters to a specified physical memory location. A pair of counters per thread is incremented at the start and end of the main processing loop within the firmware. Checking for Heartbeat consists of checking the validity of the pair of counter values for each thread. Stagnant counters indicate a firmware hang. The first patch removes historical and never used HB definitions. Patch no. 2 is implementing the hardware clock frequency measuring interface. The third introduces the main heartbeat implementation with the debugfs interface. The last patch implements an algorithm that allows the code to detect which version of heartbeat API is used at the currently loaded firmware. Signed-off-by: Damian Muszynski Reviewed-by: Giovanni Cabiddu Reviewed-by: Andy Shevchenko Damian Muszynski (4): crypto: qat - drop obsolete heartbeat interface crypto: qat - add measure clock frequency crypto: qat - add heartbeat feature crypto: qat - add heartbeat counters check Documentation/ABI/testing/debugfs-driver-qat | 51 +++ .../intel/qat/qat_4xxx/adf_4xxx_hw_data.c | 11 + .../intel/qat/qat_4xxx/adf_4xxx_hw_data.h | 4 + drivers/crypto/intel/qat/qat_4xxx/adf_drv.c | 3 + .../intel/qat/qat_c3xxx/adf_c3xxx_hw_data.c | 28 ++ .../intel/qat/qat_c3xxx/adf_c3xxx_hw_data.h | 7 + .../intel/qat/qat_c62x/adf_c62x_hw_data.c | 28 ++ .../intel/qat/qat_c62x/adf_c62x_hw_data.h | 7 + drivers/crypto/intel/qat/qat_common/Makefile | 3 + .../intel/qat/qat_common/adf_accel_devices.h | 10 + .../crypto/intel/qat/qat_common/adf_admin.c | 31 ++ .../intel/qat/qat_common/adf_cfg_strings.h | 2 + .../crypto/intel/qat/qat_common/adf_clock.c | 127 +++++++ .../crypto/intel/qat/qat_common/adf_clock.h | 14 + .../intel/qat/qat_common/adf_common_drv.h | 2 + .../crypto/intel/qat/qat_common/adf_dbgfs.c | 9 +- .../intel/qat/qat_common/adf_gen2_config.c | 7 + .../intel/qat/qat_common/adf_gen2_hw_data.h | 3 + .../intel/qat/qat_common/adf_gen4_hw_data.h | 3 + .../intel/qat/qat_common/adf_heartbeat.c | 327 ++++++++++++++++++ .../intel/qat/qat_common/adf_heartbeat.h | 79 +++++ .../qat/qat_common/adf_heartbeat_dbgfs.c | 194 +++++++++++ .../qat/qat_common/adf_heartbeat_dbgfs.h | 12 + .../crypto/intel/qat/qat_common/adf_init.c | 15 + .../qat/qat_common/icp_qat_fw_init_admin.h | 20 +- .../qat/qat_dh895xcc/adf_dh895xcc_hw_data.c | 13 + .../qat/qat_dh895xcc/adf_dh895xcc_hw_data.h | 5 + 27 files changed, 998 insertions(+), 17 deletions(-) create mode 100644 drivers/crypto/intel/qat/qat_common/adf_clock.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_clock.h create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat.h create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.c create mode 100644 drivers/crypto/intel/qat/qat_common/adf_heartbeat_dbgfs.h base-commit: 926f061ec16ed195331e950755fd74c897aefef3