From patchwork Tue Aug 4 13:58:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yang Shen X-Patchwork-Id: 253214 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE11AC433DF for ; Tue, 4 Aug 2020 14:05:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2A7A208A9 for ; Tue, 4 Aug 2020 14:05:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728852AbgHDOFB (ORCPT ); Tue, 4 Aug 2020 10:05:01 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:60916 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728775AbgHDOAt (ORCPT ); Tue, 4 Aug 2020 10:00:49 -0400 Received: from DGGEMS409-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id B2DCDC35B44826558FDF; Tue, 4 Aug 2020 22:00:38 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS409-HUB.china.huawei.com (10.3.19.209) with Microsoft SMTP Server id 14.3.487.0; Tue, 4 Aug 2020 22:00:31 +0800 From: Yang Shen To: , CC: , , , Subject: [PATCH v4 07/10] crypto: hisilicon/qm - fix VF not available after PF FLR Date: Tue, 4 Aug 2020 21:58:27 +0800 Message-ID: <1596549510-2373-8-git-send-email-shenyang39@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596549510-2373-1-git-send-email-shenyang39@huawei.com> References: <1596549510-2373-1-git-send-email-shenyang39@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Shukun Tan When PF FLR, the hardware will actively trigger the VF FLR. Configuration space of VF needs to be saved and restored to ensure that it is available after the PF FLR. Fixes: 7ce396fa12a9("crypto: hisilicon - add FLR support") Signed-off-by: Shukun Tan Signed-off-by: Yang Shen Reviewed-by: Zhou Wang --- drivers/crypto/hisilicon/qm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index 427c3e0..914771f 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -3317,6 +3317,9 @@ static int qm_vf_reset_prepare(struct hisi_qm *qm, continue; if (pci_physfn(virtfn) == pdev) { + /* save VFs PCIE BAR configuration */ + pci_save_state(virtfn); + ret = hisi_qm_stop(vf_qm, stop_reason); if (ret) goto stop_fail; @@ -3480,6 +3483,9 @@ static int qm_vf_reset_done(struct hisi_qm *qm) continue; if (pci_physfn(virtfn) == pdev) { + /* enable VFs PCIE BAR configuration */ + pci_restore_state(virtfn); + ret = qm_restart(vf_qm); if (ret) goto restart_fail;