From patchwork Sun Jun 16 22:07:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 805002 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BB2726BFC0; Sun, 16 Jun 2024 22:09:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718575742; cv=none; b=SFuuCrku0w3o7CnOpHULm1kUfAR9PhpR50m3/jZWh+GDI7KMG/N6Wu27JUqst6h9asBk8FZJPOZbGkl/uYBVETKvP+5PqYm5Ld/mSihrslK9u9Gr2X+yGAPjiBb4SjI0vaLZVNvAvLVaBFf9wm9O+3OnQYdnsjGbOvN+S8lA3P0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718575742; c=relaxed/simple; bh=KvmbdydXpOos6pQj7PzGDoZI5wEE4oJZr9Q2b/564JQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=RkzlScHxNoXDs+swpPRPdjSv5NISVWEGmipcshQiw4Q60A1OtNzM4TrAHeFnJatJseVU4UAf06Ac2VRSDpgjb2fpzauksvhtQN4giOw08yAFTyka0hJQaDmP+ZrvyDncpdRbwGoFQPp5g269oxNkqDmI5v56XVgo6ngGVtBxgfs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D79481516; Sun, 16 Jun 2024 15:09:24 -0700 (PDT) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6DB923F73B; Sun, 16 Jun 2024 15:08:58 -0700 (PDT) From: Andre Przywara To: Corentin Labbe , Herbert Xu , "David S . Miller" , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-crypto@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org Subject: [PATCH 4/4] arm64: dts: allwinner: h616: add crypto engine node Date: Sun, 16 Jun 2024 23:07:19 +0100 Message-Id: <20240616220719.26641-5-andre.przywara@arm.com> X-Mailer: git-send-email 2.39.4 In-Reply-To: <20240616220719.26641-1-andre.przywara@arm.com> References: <20240616220719.26641-1-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Allwinner H616 SoC contains a crypto engine very similar to the H6 version, but with all base addresses in the DMA descriptors shifted by two bits. This requires a new compatible string. Also the H616 CE relies on the internal osciallator for the TRNG operation, so we need to reference this clock. Signed-off-by: Andre Przywara --- arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index 921d5f61d8d6a..187663d45ed72 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -113,6 +113,16 @@ soc { #size-cells = <1>; ranges = <0x0 0x0 0x0 0x40000000>; + crypto: crypto@1904000 { + compatible = "allwinner,sun50i-h616-crypto"; + reg = <0x01904000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>, + <&ccu CLK_MBUS_CE>, <&rtc CLK_IOSC>; + clock-names = "bus", "mod", "ram", "trng"; + resets = <&ccu RST_BUS_CE>; + }; + syscon: syscon@3000000 { compatible = "allwinner,sun50i-h616-system-control"; reg = <0x03000000 0x1000>;