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AJvYcCUTVnEeAxNa7DQY04hp/pJAJCYPkKxw7J75QLuLP0W01ruXZLTafGp3r/CIYe31wMBe8wiPETinX2+RZ41Qps0hk1Dkm5ddan6+jmeY X-Gm-Message-State: AOJu0YwDV26Qka09EygsDINfB4CWNk9p7EjaQjQovRwtohJiSkiNQD4r BUwR+XO19zkDuve201Tt68Jnw/5K/BXC4H3miVX2tOpjEMJ4mEUxGRBTHUzbDvI= X-Google-Smtp-Source: AGHT+IFuFpjdFpuLvIdaYw3w/WCr1/gHlrImp8DoWkXpIxzm220GdkXoQwm/XTk+jxZ+CH+KzmX0Xg== X-Received: by 2002:a05:6820:161e:b0:5bb:2d23:8aeb with SMTP id 006d021491bc7-5bdadb68eb5mr13265376eaf.2.1718671065156; Mon, 17 Jun 2024 17:37:45 -0700 (PDT) Received: from localhost ([136.62.192.75]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-5bd5e19e943sm1229935eaf.23.2024.06.17.17.37.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 17 Jun 2024 17:37:44 -0700 (PDT) From: Sam Protsenko To: =?utf-8?q?=C5=81ukasz_Stelmach?= , Krzysztof Kozlowski , Rob Herring , Conor Dooley Cc: Olivia Mackall , Herbert Xu , Alim Akhtar , linux-samsung-soc@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/7] dt-bindings: rng: Add Exynos850 support to exynos-trng Date: Mon, 17 Jun 2024 19:37:38 -0500 Message-Id: <20240618003743.2975-3-semen.protsenko@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240618003743.2975-1-semen.protsenko@linaro.org> References: <20240618003743.2975-1-semen.protsenko@linaro.org> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The TRNG block in Exynos850 is pretty much the same as in Exynos5250, but there are two clocks that has to be controlled to make it work: 1. Functional (operating) clock: called ACLK in Exynos850, the same as "secss" clock in Exynos5250 2. Interface (bus) clock: called PCLK in Exynos850. It has to be enabled in order to access TRNG registers Document Exynos850 compatible and the related clock changes, and provide a corresponding example for Exynos850 TRNG node with ACLK and PCLK clocks. Signed-off-by: Sam Protsenko --- .../bindings/rng/samsung,exynos-trng.yaml | 49 +++++++++++++++++-- 1 file changed, 45 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/rng/samsung,exynos-trng.yaml b/Documentation/devicetree/bindings/rng/samsung,exynos-trng.yaml index 99c382d25c11..e57310fa89c7 100644 --- a/Documentation/devicetree/bindings/rng/samsung,exynos-trng.yaml +++ b/Documentation/devicetree/bindings/rng/samsung,exynos-trng.yaml @@ -12,14 +12,17 @@ maintainers: properties: compatible: - const: samsung,exynos5250-trng + enum: + - samsung,exynos5250-trng + - samsung,exynos850-trng clocks: - maxItems: 1 + minItems: 1 + maxItems: 2 clock-names: - items: - - const: secss + minItems: 1 + maxItems: 2 reg: maxItems: 1 @@ -30,6 +33,35 @@ required: - clock-names - reg +allOf: + - if: + properties: + compatible: + contains: + const: samsung,exynos850-trng + + then: + properties: + clocks: + items: + - description: SSS (Security Sub System) operating clock + - description: SSS (Security Sub System) bus clock + + clock-names: + items: + - const: secss + - const: pclk + + else: + properties: + clocks: + items: + - description: SSS (Security Sub System) operating clock + + clock-names: + items: + - const: secss + additionalProperties: false examples: @@ -42,3 +74,12 @@ examples: clocks = <&clock CLK_SSS>; clock-names = "secss"; }; + - | + #include + + rng@12081400 { + compatible = "samsung,exynos850-trng"; + reg = <0x12081400 0x100>; + clocks = <&cmu_core CLK_GOUT_SSS_ACLK>, <&cmu_core CLK_GOUT_SSS_PCLK>; + clock-names = "secss", "pclk"; + };