diff mbox series

[v2,4/7] hwrng: exynos: Implement bus clock control

Message ID 20240618204523.9563-5-semen.protsenko@linaro.org
State Superseded
Headers show
Series hwrng: exynos: Add support for Exynos850 | expand

Commit Message

Sam Protsenko June 18, 2024, 8:45 p.m. UTC 
Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be
enabled in order to access TRNG registers. Add and handle the optional
PCLK clock accordingly to make it possible.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
  - Used devm_clk_get_optional_enabled() to avoid calling
    clk_prepare_enable() for PCLK

 drivers/char/hw_random/exynos-trng.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

Comments

Krzysztof Kozlowski June 20, 2024, 7:29 a.m. UTC | #1 
On 18/06/2024 22:45, Sam Protsenko wrote:
> Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be
> enabled in order to access TRNG registers. Add and handle the optional
> PCLK clock accordingly to make it possible.
> 
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Anand Moon June 20, 2024, 9:27 a.m. UTC | #2 
Hi Sam,

On Wed, 19 Jun 2024 at 02:15, Sam Protsenko <semen.protsenko@linaro.org> wrote:
>
> Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be
> enabled in order to access TRNG registers. Add and handle the optional
> PCLK clock accordingly to make it possible.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
> ---
> Changes in v2:
>   - Used devm_clk_get_optional_enabled() to avoid calling
>     clk_prepare_enable() for PCLK
>

Reviewed-by: Anand Moon <linux.amoon@gmail.com>

Thanks

-Anand
diff mbox series

Patch

diff --git a/drivers/char/hw_random/exynos-trng.c b/drivers/char/hw_random/exynos-trng.c
index 91c210d80a3d..99a0b271ffb7 100644
--- a/drivers/char/hw_random/exynos-trng.c
+++ b/drivers/char/hw_random/exynos-trng.c
@@ -47,7 +47,8 @@ 
 struct exynos_trng_dev {
 	struct device	*dev;
 	void __iomem	*mem;
-	struct clk	*clk;
+	struct clk	*clk;	/* operating clock */
+	struct clk	*pclk;	/* bus clock */
 	struct hwrng	rng;
 };
 
@@ -141,6 +142,13 @@  static int exynos_trng_probe(struct platform_device *pdev)
 		goto err_clock;
 	}
 
+	trng->pclk = devm_clk_get_optional_enabled(&pdev->dev, "pclk");
+	if (IS_ERR(trng->pclk)) {
+		ret = dev_err_probe(&pdev->dev, PTR_ERR(trng->pclk),
+				    "Could not get pclk");
+		goto err_clock;
+	}
+
 	ret = devm_hwrng_register(&pdev->dev, &trng->rng);
 	if (ret) {
 		dev_err(&pdev->dev, "Could not register hwrng device.\n");