From patchwork Fri Jun 21 01:25:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 806406 Received: from pidgin.makrotopia.org (pidgin.makrotopia.org [185.142.180.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A4C959168; Fri, 21 Jun 2024 01:25:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.142.180.65 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718933146; cv=none; b=EXUjo2Ir/kk2iC/+w62OcaP9rE3VFGqUaYKv9ZoQqpPYgyhTWGsOvuGanUjzvAEIJ0RlwL8CH4dsTmO6hMqUJ8nZ7EwjCvFWEjcq2w81v2swzTNgeHkCSegKimwJ+dGY3Y6iDOxAGwDk3Uw+UHyLEf7PnFxBZL7Ce2fwh2mXPFA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718933146; c=relaxed/simple; bh=ZFltDS7YSwafHR0wKjFiJQxNk4bq14Kvuvr2Xv3jiM8=; h=Date:From:To:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=AJb339cgpzhK+jIzZWhiOR1dIRs3mbdwoIYiZOwlPkOZ3k95WpjXN0Q2mb5u4xIxuATeJo+bGfk99D7dhXHlr0eBzdUfw1XOZfAdbzNPycaSkS4OmZCqJbEXsjccVhrDYNPiDeeN2z46RV65SNS9RsdiA0erpMN05VXXqWP7lGM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org; spf=pass smtp.mailfrom=makrotopia.org; arc=none smtp.client-ip=185.142.180.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=makrotopia.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=makrotopia.org Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.97.1) (envelope-from ) id 1sKT1x-000000004el-3zVQ; Fri, 21 Jun 2024 01:25:34 +0000 Date: Fri, 21 Jun 2024 02:25:30 +0100 From: Daniel Golle To: Daniel Golle , Aurelien Jarno , Olivia Mackall , Herbert Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Philipp Zabel , Uwe =?iso-8859-1?q?Kleine-K=F6nig?= , Sebastian Reichel , Anand Moon , Dragan Simic , Sascha Hauer , Martin Kaiser , Ard Biesheuvel , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x Message-ID: References: Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: From: Aurelien Jarno Enable the just added Rockchip RNG driver for RK356x SoCs. Signed-off-by: Aurelien Jarno Signed-off-by: Daniel Golle --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index d8543b5557ee..57c8103500ea 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1855,6 +1855,15 @@ usb2phy1_otg: otg-port { }; }; + rng: rng@fe388000 { + compatible = "rockchip,rk3568-rng"; + reg = <0x0 0xfe388000 0x0 0x4000>; + clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>; + clock-names = "core", "ahb"; + resets = <&cru SRST_TRNG_NS>; + reset-names = "reset"; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3568-pinctrl"; rockchip,grf = <&grf>;