From patchwork Wed Feb 20 07:42:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sugaya Taichi X-Patchwork-Id: 158794 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4612624jaa; Tue, 19 Feb 2019 23:42:31 -0800 (PST) X-Google-Smtp-Source: AHgI3IYW9XOLpUHAQFjTDgXxgjm8QcGMWJQdjDSje1MEy0Id3pyrPuTaWn7cXWHUw07BToO/jtnt X-Received: by 2002:a63:591f:: with SMTP id n31mr12536364pgb.304.1550648551085; Tue, 19 Feb 2019 23:42:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550648551; cv=none; d=google.com; s=arc-20160816; b=Kec7xLjr8A3DBVRA7rFNoouJ3Hzl5ZGB5Mg6N/khwy13C5nEmyAYPWAvHPrqCIXNpI c2WXgBku5gfnUB7kuc7/R1Je/lvjfriYoXyhUYZvjoQidGHlomllJ6K7fOoc9RnYlRCj DfPLuTmLvST1YVTfI8MHVTMk3ny9pd0LsCfzSx1tkmAhqVnIThJA1Fj3GSo6f1FhjwP7 R1EBBpnCU2H3HijBKwIZ91njKVopTlkB082Lyn20HWDmploODf0Yb0qnQzRWcH28C2lR Dyfnda3XtX97Df4AejzD5g9JgzgjgOq+Lr1aGb/g0eLzdv0DL7KPVH4rmvlOc7taYKgt 27sA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=BBCdDQRjsFMvXF9/ej/270sISQ/hL1KaiCUH0XLjkCc=; b=UEgdcqN9US8DTVD/zAgsRbNbEz/26WVSdp4SukON9Nsec2zSJrAahZQb+/WY9KRopi 2/oJOHnmOb/0oD0zx9119BNoY3iZ8QFDborOBseUKSWwgqjzJnsvMKLHJtF2Z4bnbjgp 6owFcGA+lSXofzGMOg7bANAVTi/c+zyCbRZ0xCRXvYlHcqhM4JaHPoDPtkocqh7RXhge lNToPUiUX8IMJko+2/jeuxi89olE/xWHLvT+PQnkrK+3kiV9IjemKhCnVlMz/kwvsypX hw3bFKohcJJLtW6JJiQWrpykxIc8SJ4Di6FnevIi52B9owSFgGZlMtpYzniUKPsDG0K4 tpwA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b11si19523006plb.427.2019.02.19.23.42.30; Tue, 19 Feb 2019 23:42:31 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725778AbfBTHma (ORCPT + 7 others); Wed, 20 Feb 2019 02:42:30 -0500 Received: from mx.socionext.com ([202.248.49.38]:4065 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725379AbfBTHm3 (ORCPT ); Wed, 20 Feb 2019 02:42:29 -0500 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 20 Feb 2019 16:42:27 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id A1629180097; Wed, 20 Feb 2019 16:42:27 +0900 (JST) Received: from 172.31.9.53 (172.31.9.53) by m-FILTER with ESMTP; Wed, 20 Feb 2019 16:42:27 +0900 Received: from yuzu.css.socionext.com (yuzu [172.31.8.45]) by iyokan.css.socionext.com (Postfix) with ESMTP id 3C70A40368; Wed, 20 Feb 2019 16:42:27 +0900 (JST) Received: from M20VSDK.e01.socionext.com (unknown [10.213.118.34]) by yuzu.css.socionext.com (Postfix) with ESMTP id 1843F120459; Wed, 20 Feb 2019 16:42:27 +0900 (JST) From: Sugaya Taichi To: devicetree@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Cc: Rob Herring , Mark Rutland , Greg Kroah-Hartman , Daniel Lezcano , Thomas Gleixner , Russell King , Masahiro Yamada , Arnd Bergmann , Takao Orito , Kazuhiro Kasai , Shinji Kanematsu , Jassi Brar , Masami Hiramatsu , Sugaya Taichi Subject: [PATCH v3 0/9] Add basic support for Socionext Milbeaut M10V SoC Date: Wed, 20 Feb 2019 16:42:58 +0900 Message-Id: <1550648578-9928-1-git-send-email-sugaya.taichi@socionext.com> X-Mailer: git-send-email 1.9.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hi, Here is the series of patches the initial support for SC2000(M10V) of Milbeaut SoCs. "M10V" is the internal name of SC2000, so commonly used in source code. SC2000 is a SoC of the Milbeaut series. equipped with a DSP optimized for computer vision. It also features advanced functionalities such as 360-degree, real-time spherical stitching with multi cameras, image stabilization for without mechanical gimbals, and rolling shutter correction. More detail is below: https://www.socionext.com/en/products/assp/milbeaut/SC2000.html Specifications for developers are below: - Quad-core 32bit Cortex-A7 on ARMv7-A architecture - NEON support - DSP - GPU - MAX 3GB DDR3 - Cortex-M0 for power control - NAND Flash Interface - SD UHS-I - SD UHS-II - SDIO - USB2.0 HOST / Device - USB3.0 HOST / Device - PCI express Gen2 - Ethernet Engine - I2C - UART - SPI - PWM Support is quite minimal for now, since it only includes timer, clock, pictrl and serial controller drivers, so we can only boot to userspace through initramfs. Support for the other peripherals will come eventually. Changes since v2: * Drop clk, pinctrl, and serial driver. * Drop unneeded options from defconfig. * Convert milbeaut soc binding to yaml. * Fix serial driver binding. * Change serial id of aliases in DT. * Add platform checking when entering suspend/resume. * Drop pr_err()s. Changes since v1: * Change file names. * Change #define names. * Refine cpu-enable-method and bindigs. * Add documentation for Milbeaut SoCs. * Add more infomation for timer driver. * Add sched_clock to timer driver. * Refine whole of clk driver. * Add earlycon instead of earlyprintk. * Refine Device Tree. Sugaya Taichi (9): dt-bindings: sram: milbeaut: Add binding for Milbeaut smp-sram dt-bindings: arm: Add SMP enable-method for Milbeaut dt-bindings: Add documentation for Milbeaut SoCs ARM: milbeaut: Add basic support for Milbeaut m10v SoC dt-bindings: timer: Add Milbeaut M10V timer description clocksource/drivers/timer-milbeaut: Introduce timer for Milbeaut SoCs dt-bindings: serial: Add Milbeaut serial driver description ARM: dts: milbeaut: Add device tree set for the Milbeaut M10V board ARM: configs: Add Milbeaut M10V defconfig Documentation/devicetree/bindings/arm/cpus.yaml | 1 + .../bindings/arm/socionext/milbeaut.yaml | 22 +++ .../devicetree/bindings/serial/milbeaut-uart.txt | 21 +++ .../devicetree/bindings/sram/milbeaut-smp-sram.txt | 24 +++ .../bindings/timer/socionext,milbeaut-timer.txt | 17 ++ arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/milbeaut-m10v-evb.dts | 32 ++++ arch/arm/boot/dts/milbeaut-m10v.dtsi | 95 +++++++++++ arch/arm/configs/milbeaut_m10v_defconfig | 175 +++++++++++++++++++++ arch/arm/configs/multi_v7_defconfig | 2 + arch/arm/mach-milbeaut/Kconfig | 20 +++ arch/arm/mach-milbeaut/Makefile | 1 + arch/arm/mach-milbeaut/platsmp.c | 143 +++++++++++++++++ drivers/clocksource/Kconfig | 9 ++ drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-milbeaut.c | 161 +++++++++++++++++++ 18 files changed, 728 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/socionext/milbeaut.yaml create mode 100644 Documentation/devicetree/bindings/serial/milbeaut-uart.txt create mode 100644 Documentation/devicetree/bindings/sram/milbeaut-smp-sram.txt create mode 100644 Documentation/devicetree/bindings/timer/socionext,milbeaut-timer.txt create mode 100644 arch/arm/boot/dts/milbeaut-m10v-evb.dts create mode 100644 arch/arm/boot/dts/milbeaut-m10v.dtsi create mode 100644 arch/arm/configs/milbeaut_m10v_defconfig create mode 100644 arch/arm/mach-milbeaut/Kconfig create mode 100644 arch/arm/mach-milbeaut/Makefile create mode 100644 arch/arm/mach-milbeaut/platsmp.c create mode 100644 drivers/clocksource/timer-milbeaut.c -- 1.9.1