From patchwork Wed Jan 15 11:30:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianxin Pan X-Patchwork-Id: 205701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80B2DC33CB1 for ; Wed, 15 Jan 2020 11:30:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5B6EB24679 for ; Wed, 15 Jan 2020 11:30:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730002AbgAOLah (ORCPT ); Wed, 15 Jan 2020 06:30:37 -0500 Received: from mail-sh.amlogic.com ([58.32.228.43]:38651 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729758AbgAOLag (ORCPT ); Wed, 15 Jan 2020 06:30:36 -0500 Received: from droid13.amlogic.com (116.236.93.172) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.1591.10; Wed, 15 Jan 2020 19:31:02 +0800 From: Jianxin Pan To: Kevin Hilman , CC: Jianxin Pan , Rob Herring , Neil Armstrong , Jerome Brunet , Martin Blumenstingl , , , , , Jian Hu , Hanjie Lin , Victor Wan , Xingyu Chen Subject: [PATCH v6 0/4] arm64: meson: add support for A1 Power Domains Date: Wed, 15 Jan 2020 19:30:27 +0800 Message-ID: <1579087831-94965-1-git-send-email-jianxin.pan@amlogic.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [116.236.93.172] Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patchset introduces a "Secure Power Doamin Controller". In A1/C1, power controller registers such as PWRCTRL_FOCRSTN, PWRCTRL_PWR_OFF, PWRCTRL_MEM_PD and PWRCTRL_ISO_EN, are in the secure domain, and should be accessed from ATF by smc. The secure-pwrc will not be probed before the secure watchdog patchset is merged at [6], which adds of_platform_default_populate() in meson_sm_probe(). Changes since v5 at [4]: - Move sec-pwrc to child node of secure-monitor according to Rob's suggestion at [5] Changes since v4 at [3]: - add SM_A1_ prefix for PWRC_SET/GET - rename variable and update comments Changes since v3 at [2]: - remove phandle to secure-monitor node Changes since v2 at [1]: - update domain id - include dt-bindings in dts Changes since v1 at [0]: - use APIs from sm driver - rename pwrc_secure_get_power as Kevin suggested - add comments for always on domains - replace arch_initcall_sync with builtin_platform_driver - fix coding style [0] https://lore.kernel.org/linux-amlogic/1568895064-4116-1-git-send-email-jianxin.pan@amlogic.com [1] https://lore.kernel.org/linux-amlogic/1570695678-42623-1-git-send-email-jianxin.pan@amlogic.com [2] https://lore.kernel.org/linux-amlogic/1571391167-79679-1-git-send-email-jianxin.pan@amlogic.com [3] https://lore.kernel.org/linux-amlogic/1572868028-73076-1-git-send-email-jianxin.pan@amlogic.com [4] https://lore.kernel.org/linux-amlogic/1573532930-39505-2-git-send-email-jianxin.pan@amlogic.com [5] https://lore.kernel.org/linux-amlogic/07f0ed9d-0b1a-d84f-de8b-1967e56bbd21@amlogic.com/ [6] https://lore.kernel.org/linux-amlogic/1578973527-4759-3-git-send-email-xingyu.chen@amlogic.com Jianxin Pan (4): firmware: meson_sm: Add secure power domain support dt-bindings: power: add Amlogic secure power domains bindings soc: amlogic: Add support for Secure power domains controller arm64: dts: meson: a1: add secure power domain controller .../bindings/power/amlogic,meson-sec-pwrc.yaml | 40 ++++ arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 6 + drivers/firmware/meson/meson_sm.c | 2 + drivers/soc/amlogic/Kconfig | 13 ++ drivers/soc/amlogic/Makefile | 1 + drivers/soc/amlogic/meson-secure-pwrc.c | 204 +++++++++++++++++++++ include/dt-bindings/power/meson-a1-power.h | 32 ++++ include/linux/firmware/meson/meson_sm.h | 2 + 8 files changed, 300 insertions(+) create mode 100644 Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml create mode 100644 drivers/soc/amlogic/meson-secure-pwrc.c create mode 100644 include/dt-bindings/power/meson-a1-power.h