| Message ID | 1646737394-4740-1-git-send-email-quic_srivasam@quicinc.com |
|---|---|
| Headers | show |
| Series | Add pin control support for lpass sc7280 | expand |
On 3/8/2022 11:43 PM, Bjorn Andersson wrote: Thanks for your time Bjorn!!! > On Tue 08 Mar 03:03 PST 2022, Srinivasa Rao Mandadapu wrote: > >> Update bulk clock voting to optional voting as ADSP bypass platform doesn't >> need macro and decodec clocks, > Even I am not sure what "ADSP bypass platform" means, so please express > this better. Actually LPASS contains internal DSP for post processing and other activities. Some vendors are provided LPASS HW without enabling DSP. That's why, we call ADSP Bypass. > > Are they optional because sc7280 typically come with ADSP based audio, > but it might not and if not then we shouldn't control those clocks? They are GDSC switches. In ADSP based solution, HLOS intiate as clock to DSP firmware and it handles GDSC switch. In case of ADSP bypass solution, kernel Clock drivers handles them as power domains. These GDSCs in genaral gets on if we vote for any clock which depends on them. > >> these are maintained as power domains and >> operated from lpass audio core cc. >> > So there are clocks, but they are exposed as power-domains? Or are you > just trying to say that the LPASS LPI pinctrl block is always in a > power-domain controlled by the audio clock-controller? > > Regards, > Bjorn Yes, They are actually GDSC switches, but they are controlled as power domains in case of ADSP bypass case and as clocks in ADSP based solutions. > >> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> >> Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> >> Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com> >> --- >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 12 +++++++++--- >> drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 1 + >> drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 1 + >> 3 files changed, 11 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c >> index 1ab572f..c618b74 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c >> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c >> @@ -407,9 +407,15 @@ int lpi_pinctrl_probe(struct platform_device *pdev) >> return dev_err_probe(dev, PTR_ERR(pctrl->slew_base), >> "Slew resource not provided\n"); >> >> - ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); >> - if (ret) >> - return dev_err_probe(dev, ret, "Can't get clocks\n"); >> + if (data->is_clk_optional) { >> + ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks); >> + if (ret) >> + return dev_err_probe(dev, ret, "Can't get clocks\n"); >> + } else { >> + ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks); >> + if (ret) >> + return dev_err_probe(dev, ret, "Can't get clocks\n"); >> + } >> >> ret = clk_bulk_prepare_enable(MAX_LPI_NUM_CLKS, pctrl->clks); >> if (ret) >> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h >> index afbac2a..3bcede6 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h >> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.h >> @@ -77,6 +77,7 @@ struct lpi_pinctrl_variant_data { >> int ngroups; >> const struct lpi_function *functions; >> int nfunctions; >> + int is_clk_optional; >> }; >> >> int lpi_pinctrl_probe(struct platform_device *pdev); >> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> index d67ff25..304d8a2 100644 >> --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c >> @@ -142,6 +142,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = { >> .ngroups = ARRAY_SIZE(sc7280_groups), >> .functions = sc7280_functions, >> .nfunctions = ARRAY_SIZE(sc7280_functions), >> + .is_clk_optional = 1, >> }; >> >> static const struct of_device_id lpi_pinctrl_of_match[] = { >> -- >> 2.7.4 >>
This patch series is to split lpass variant common pin control functions and SoC specific functions and to add lpass sc7280 pincontrol support. It also Adds dt-bindings for lpass sc7280 lpass lpi pincontrol. Changes Since V9: -- Add pinctrl groups macro to Kconfig. Changes Since V8: -- Remove redundant headers included in v8. Changes Since V7: -- Update optional clock voting with conditional check. -- Add const to lpi_pinctrl_variant_data structure. -- Update required headers and remove redundant. -- Change EXPORT_SYMBOL to EXPORT_SYMBOL_GPL -- Fix typo errors. Changes Since V6: -- Update conditional clock voting to optional clock voting. -- Update Kconfig depends on field with select. -- Fix typo errors. Changes Since V5: -- Create new patch by updating macro name to lpi specific. -- Create new patch by updating lpi pin group structure with core group_desc structure. -- Fix typo errors. -- Sort macros in the make file and configuration file. Changes Since V4: -- Update commit message and description of the chip specific extraction patch. -- Sort macros in kconfig and makefile. -- Update optional clock voting to conditional clock voting. -- Fix typo errors. -- Move to quicinc domain email id's. Changes Since V3: -- Update separate Kconfig fields for sm8250 and sc7280. -- Update module license and description. -- Move static variables to corresponding .c files from header file. Changes Since V2: -- Add new dt-bindings for sc7280 lpi driver. -- Make clock voting change as separate patch. -- Split existing pincontrol driver and make common functions as part of separate file. -- Rename lpass pincontrol lpi dt-bindings to sm8250 specific dt-bindings Changes Since V1: -- Make lpi pinctrl variant data structure as constant -- Add appropriate commit message -- Change signedoff by sequence. Srinivasa Rao Mandadapu (7): dt-bindings: pinctrl: qcom: Update lpass lpi file name to SoC specific dt-bindings: pinctrl: qcom: Add sc7280 lpass lpi pinctrl bindings pinctrl: qcom: Update macro name to LPI specific pinctrl: qcom: Update lpi pin group structure pinctrl: qcom: Extract chip specific LPASS LPI code pinctrl: qcom: Add SC7280 lpass pin configuration pinctrl: qcom: Update clock voting as optional Tested this on SM8250 MTP with WSA and WCD codecs. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> .../bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml | 133 ----------- .../pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml | 115 ++++++++++ .../pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml | 133 +++++++++++ drivers/pinctrl/qcom/Kconfig | 17 ++ drivers/pinctrl/qcom/Makefile | 2 + drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 255 ++------------------- drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 86 +++++++ drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c | 168 ++++++++++++++ drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c | 165 +++++++++++++ 9 files changed, 704 insertions(+), 370 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,lpass-lpi-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-lpass-lpi.h create mode 100644 drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c create mode 100644 drivers/pinctrl/qcom/pinctrl-sm8250-lpass-lpi.c