From patchwork Mon Jul 23 04:17:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 142539 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5602934ljj; Sun, 22 Jul 2018 21:18:03 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcBYi5Wk+aCxi5TtUExb+Dz9lpW1hL5/SAGF3NEFEVK2HUXUSiiaoZmPILNb6y8j0FPCxp6 X-Received: by 2002:a63:5d58:: with SMTP id o24-v6mr10829722pgm.349.1532319482966; Sun, 22 Jul 2018 21:18:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532319482; cv=none; d=google.com; s=arc-20160816; b=iJylCAbFxH9v2S/dVWyUhd7IJio2E52yXB4dFcogm0fHzZkYvtrX0jKxxx4dQBviM0 ZOgT7XQ+opdqubzgmULPDQbS3wIK5kGNI25AMSW0bWUHrKiZkd7YNpRro8BoSXBct4JS 75Zv+et9N8kaphSWGzqXoiTY/vaS2VQZRbrgEpoflhdHTqhJsyZRRkytoIAGMz6tCC6P +AA/+f/GwoC+0pF12vRobkFoquPPHb3MU8RD8x8H/tIlxDy8f5tLZl5gxCYQgmj+TOwG ovtSyTWmcIxaGrQpYraj+Wr42if2L7qxm03/Iq6oxJPx6tlhFfV5fN+/Q0AAlwGgehXh 6c7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=Ala/fOrtQTW4XJ0Z0aHcfFPJoy4AzaTxw+FXeBo8rus=; b=CC0Q7PSTuT8L0QB8VDstifNzDygjoTlPRQIq77MqWmgDCnBabhhEmNFmms0Oo+YB8V +rQl2wLfCRi1hSLe4ke6pnDlzvHqjTm3zn5vEX0EweT90BNl+c2VC83OB16SbHw3z19y XAyW4wvsvFy68Zgy1e9bdsK54ABD6suVBxkC8SezrnaaMgwXdVrII4RkfUMdvQ2boWRG F6pucECXP7fi9rAKjrzmpa7EG/Epac92N+3w+HojRLDbsBU0tw6PsrVEDAU9wK79ySnQ pGCjS/O2JEIPW4Xv76znAibSKF3YdiBL7FH7ObFbVQhNDwUwhfmNxcCUQ0QBpjwAt4CU f0Ug== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=AzYHWGhB; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b31-v6si7870375pgl.437.2018.07.22.21.18.02; Sun, 22 Jul 2018 21:18:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=AzYHWGhB; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726619AbeGWFRO (ORCPT + 3 others); Mon, 23 Jul 2018 01:17:14 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:45910 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726162AbeGWFRO (ORCPT ); Mon, 23 Jul 2018 01:17:14 -0400 Received: by mail-pl0-f67.google.com with SMTP id 94-v6so7677327ple.12 for ; Sun, 22 Jul 2018 21:18:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=o58N5bHQsq/+j9F99o0CqQR4WTmR1eeXgvHYhmsNOrQ=; b=AzYHWGhBihmWpCm4tMti3HinWoknKSd6NxBR+A+75CO7FWwGx3yZ281emJDWDIUH3U M3J6NaNgOu3Nvec/EYqbD3OHqCVg8pfz0k9mMG/CyklPvIW/dcLrchK/fJ/hfPP2QNO3 9mA7xyU8sLSl2MVgk49w0hsTmjUL34FKuj3/A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=o58N5bHQsq/+j9F99o0CqQR4WTmR1eeXgvHYhmsNOrQ=; b=K/dfKeAvbwDh44poRs6fgr5360hKrRtos5DMtfNt7CFjuB8yGx7Qt2YvaMScrzCQA7 G8mfngAWXrXZ+Ekeomjk5xytnhng87X/9obX4gHHGO1AUpUNkDX5cRwpwxfr0oz3hZ2z sQRQcJXLvinXaqbcEtNQdxDKXVSl9m2dl9SGfRlxZij/1L4HIBsPbDfRtwFxwv9mZ/As /IvRDCv9XnlAO3DIlNPjABXE3bbAWSToJxfn279XGJcxZ/bZDbptlZ/iDE+svNFPSCPT M4D3wQ1tiEC8I5yfuCO2sc3xBQy2ShcrBg6kQYp/7YpPEIjOOMfgGmr3riNvjIfMbTqD gaqA== X-Gm-Message-State: AOUpUlEBjbNBUCouohE9z28RRZirq7lOnvQAhW/QhfLyJxaVMRDc14Ng 0bzlwmiAdHW4K2xgqN1Na4gk X-Received: by 2002:a17:902:209:: with SMTP id 9-v6mr11475965plc.270.1532319481344; Sun, 22 Jul 2018 21:18:01 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:802:a98c:b568:c01f:49a2:2aa5]) by smtp.gmail.com with ESMTPSA id i20-v6sm13369282pfj.82.2018.07.22.21.17.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 22 Jul 2018 21:18:00 -0700 (PDT) From: Manivannan Sadhasivam To: vkoul@kernel.org, dan.j.williams@intel.com, afaerber@suse.de, robh+dt@kernel.org Cc: dmaengine@vger.kernel.org, liuwei@actions-semi.com, 96boards@ucrobotics.com, devicetree@vger.kernel.org, daniel.thompson@linaro.org, amit.kucheria@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, hzhang@ucrobotics.com, bdong@ucrobotics.com, manivannanece23@gmail.com, thomas.liau@actions-semi.com, jeff.chen@actions-semi.com, pn@denx.de, edgar.righi@lsitec.org.br, Manivannan Sadhasivam Subject: [PATCH v2 0/4] Add Actions Semi Owl family S900 DMA Controller support Date: Mon, 23 Jul 2018 09:47:39 +0530 Message-Id: <20180723041743.32024-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org This patchset adds DMA controller support for Actions Semi Owl family S900 SoC. This driver has been structured in a way such that there will be only one controller driver for the whole Owl family series (S500, S700 and S900 SoCs). There are 12 physical channels and 46 logical channels supported by the DMA controller. The DMA controller also supports 4 software configurable interrupt lines for the priority based DMA usecase. But the DMA driver supports only 1 interrupt for simplification. By default, the driver uses Linked list mode for all transfers. Right now only MEMCPY support has been added and the rest (SLAVE, CYCLIC) will be added in upcoming patches. The driver has been tested using dmatest utility on the Bubblegum-96 board. The DTS patches in this series depends on the pinctrl DTS patches submitted [1], which is yet to be merged by the platform maintainer Andreas. Since the DMA driver goes through DMA tree and the relevant DTS patches goes through ARM-SoC tree, Andreas will pick it up once it has been reviewed. For the reference, I have queued up all reviewed dts patches so far in my repo [2] from which Andreas is picking them for 4.19. Thanks, Mani [1] https://patchwork.kernel.org/patch/10322937/ [2] https://git.linaro.org/people/manivannan.sadhasivam/linux.git/log/?h=s900-for-next Changes in v2: * Fixed up the multi-line alignments according to `checkpatch --strict` Manivannan Sadhasivam (4): dt-bindings: dma: Add binding for Actions Semi Owl SoCs arm64: dts: actions: Add Actions Semi S900 DMA Controller dma: Add Actions Semi Owl family S900 DMA driver MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver .../devicetree/bindings/dma/owl-dma.txt | 46 + MAINTAINERS | 2 + arch/arm64/boot/dts/actions/s900.dtsi | 13 + drivers/dma/Kconfig | 8 + drivers/dma/Makefile | 1 + drivers/dma/owl-dma.c | 1023 +++++++++++++++++ 6 files changed, 1093 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/owl-dma.txt create mode 100644 drivers/dma/owl-dma.c -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html