From patchwork Tue Dec 18 08:05:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 154118 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3411380ljp; Tue, 18 Dec 2018 00:05:45 -0800 (PST) X-Google-Smtp-Source: AFSGD/Ww1ufE70oYWjenKen0P+qUrUojH3HiScIZD5oVcYg+M8AmJzd1IhdrKg38UTC71k73W0N0 X-Received: by 2002:a17:902:b282:: with SMTP id u2mr15834247plr.89.1545120345282; Tue, 18 Dec 2018 00:05:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1545120345; cv=none; d=google.com; s=arc-20160816; b=tHnxQnu1n77FJRQAQxO+JY2c+zuh/e82gsVdTqERwHQKtMSgKi47exu/mAEFXyLlEL t65rSWB4yc3EUSW0W9SH5iH9DuJ7vfeyOoea5w40SgwSb/m85k4E1cJSstaLDHAQA9rD sqw9eJTciH6pBH0j/lgG4HD5OSuElgnUtQqfudXkfPHfc8YKY/4Yq4IrMn/nxNU0bmQH TyZv0ugbjOWEimDcMErEsgdEUkqS0WjFUS7Dj4oPxzrpA9l8e/ACGJ2s40JU1/GSvMyL 9YzqPYKEo070RTuVQsTXZNUnAI7K9vu+l8qpPGoulhN26CFC1zGqGO+dwn/1N0kpcC2m 386Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=fNnQ01QtOuLnNql7u2t1TXH3JBjCSJxCTLjx8RnrsZs=; b=a0lvcmKETRE7lWRVppdqiCRx4TnLJfXHlhlwcVmqIuV32J6R8wOH2JMLw6fjFrh9NQ M1Eoxe/032/kPFagb3S3RMmGIXBLsqy8QqqH74QbK+7dTVRK6Xbr1zP/mMViPHY5Em20 YhVtb3B/8BiTo+PgLZeTRLWL9WVn7K5P6CL9y+Zqd3MKDuwcePeRpmudKjXk58qxGVAg KAnnjLtjYK+Rve1XU/t7lxVXQ9udpZDXKXQqGyqvm3tdxJGT66k83I3Tg5/kdxjbbGir /4j5azNrtyGOIbImKP90i4q0yw6q919RUFLYx0K5MrzlNaSZ+V1iir+UqtFbtafHQfyR fvpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AGhyNpLB; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u11si12194060plq.287.2018.12.18.00.05.45; Tue, 18 Dec 2018 00:05:45 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AGhyNpLB; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726410AbeLRIFn (ORCPT + 6 others); Tue, 18 Dec 2018 03:05:43 -0500 Received: from mail-pf1-f176.google.com ([209.85.210.176]:44803 "EHLO mail-pf1-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726362AbeLRIFn (ORCPT ); Tue, 18 Dec 2018 03:05:43 -0500 Received: by mail-pf1-f176.google.com with SMTP id u6so7747497pfh.11 for ; Tue, 18 Dec 2018 00:05:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=fNnQ01QtOuLnNql7u2t1TXH3JBjCSJxCTLjx8RnrsZs=; b=AGhyNpLBYn3t5YLs9m7KwDZnzvwgL5He9FWKcKJPDsP/H2qb6QPvkoP3MBvfWKtnAc lEHGqdSiWXEmm1lXtxfMX5oNi77av22ErUHkDpi0YrrbDnb5AJDPw21fYcwBc+AyjCnp EeRsxH1INShwnYEpTvW7Qzv+gmBxsWA4Cw+iA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=fNnQ01QtOuLnNql7u2t1TXH3JBjCSJxCTLjx8RnrsZs=; b=eBzQsGr94WJdWTKTjUPNlgCqG2Bu+G/LohilGvg9phAUdMOv+PbQ9k4KFXW6U3rMfm svvL5mTUubjlB8JW41+SshQlBztGsURoltYcem7eURth6DeARF11KdDrSPUh8Pifxkkl 6XJB/jhPwSabdxV4fZ+5+CVMPqn79FFUM/q2h7FaX3ZKjwgr61OKmmJG6cxpZZAuxeeU 40JErx1H9Yo4RlD1OJBwFdQ04EEF9Uckv2uq/ACXrw6bnkSqM0zFUmRvOaABgnnMRz7u +HJwuw+XBUiEGWlKJOPJL2Qg7L1Lbv7bIzFnA5M943W/yfZDRqEGLfMWXzJRXKsuyfZk gVeg== X-Gm-Message-State: AA+aEWYrHypSCQPmi3LAZY11X6RA/HJMj3Wl7s9AKqlO8+QRYz3I+zaL RzljH2rHLwidZyHpR/7dEUWO X-Received: by 2002:a63:4926:: with SMTP id w38mr14291485pga.353.1545120342280; Tue, 18 Dec 2018 00:05:42 -0800 (PST) Received: from localhost.localdomain ([2409:4072:702:382e:8c68:d268:ed20:5f25]) by smtp.gmail.com with ESMTPSA id 7sm45596888pfm.8.2018.12.18.00.05.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Dec 2018 00:05:41 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v6 00/11] Add initial RDA8810PL SoC and Orange Pi boards support Date: Tue, 18 Dec 2018 13:35:16 +0530 Message-Id: <20181218080527.10801-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This patchset adds initial RDA8810PL SoC and Orange Pi boards (2G IoT and i96) support. RDA8810PL is an ARM Cortex A5 based SoC with Vivante's GC860 GPU. The SoC has been added as a new ARM sub architecture with myself and Andreas as the maintainers. More information about the boards can be found in below links: 1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/ 2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/ This patchset is based on the initial revision sent out by Andreas long back (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-June/515951.html). I have extended his patchset with proper irqchip and UART drivers. Now, boards can boot into initramfs with console at UART2. Thanks, Mani Changes in v6: * Fixed the MAINTAINERS patch commit message Changes in v5: * Dropped timer and irqchip patches since they got applied * Dropped Andreas from MAINTAINERS as per his request Changes in v4: * Added Rob's Reviewed-by tags for vendor and SoC patches. * Moved platform Kconfig changes from timer and irqchip drivers to SoC support patch. * Added Marc's Reviewed-by tag for irqchip driver. * Addressed Rob's review comments for bindings patches. * Added the newly created linux-unisoc mailing list to MAINTAINERS entry. * Dropped overseas.sales@unisoc.com mail address as it is bouncing back. * Modified the DTS subject prefix to ARM: from arm: Changes in v3: As per Marc's review: * Removed unused header and defines from irqchip driver. * Removed setting flow handlers from set_type callback. * Minor code cleanups. As per Arnd's review: * Modified the UART indexes to start from 1 to match the SoC numbering * Enabled exposed UARTs (all 3 on both boards) * Modified the serial aliases as per board numbering * Added Greg's Reviewed-by tag for serial driver. Changes in v2: * Used readl/writel_relaxed calls for both irqchip and timer drivers as per Marc's review. * Implemented the logic to prevent counter wrapping during read as suggested by Marc. * Used the timer-of API as per Daniel's suggestion. * Added description about the timer in both commit log and driver. * Changed the Vendor name for RDA to Unisoc Communications Inc. * Removed the soc node level and cleaned up devicetrees as per Rob's review. * Merged interrupt controller DT patch to SoC. * Moved aliases to board dts as per Arnd's suggestion. * Removed RDA Micro support mail address and used Unisoc one and added my missing signed off by tag as per Andreas's comments. Andreas Färber (4): dt-bindings: Add RDA Micro vendor prefix dt-bindings: arm: Document RDA8810PL and reference boards ARM: Prepare RDA8810PL SoC dt-bindings: serial: Document RDA Micro UART Manivannan Sadhasivam (7): ARM: dts: Add devicetree for RDA8810PL SoC ARM: dts: Add devicetree for OrangePi 2G IoT board ARM: dts: Add devicetree for OrangePi i96 board ARM: dts: rda8810pl: Add timer support ARM: dts: rda8810pl: Add interrupt support for UART tty: serial: Add RDA8810PL UART driver MAINTAINERS: Add entry for RDA Micro SoC architecture .../admin-guide/kernel-parameters.txt | 6 + Documentation/devicetree/bindings/arm/rda.txt | 17 + .../bindings/serial/rda,8810pl-uart.txt | 17 + .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 14 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + .../boot/dts/rda8810pl-orangepi-2g-iot.dts | 50 ++ arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 50 ++ arch/arm/boot/dts/rda8810pl.dtsi | 99 +++ arch/arm/mach-rda/Kconfig | 9 + arch/arm/mach-rda/Makefile | 1 + drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 17 files changed, 1124 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rda.txt create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi create mode 100644 arch/arm/mach-rda/Kconfig create mode 100644 arch/arm/mach-rda/Makefile create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1