mbox series

[v2,0/4] Add support for Thor96 board

Message ID 20191030090124.24900-1-manivannan.sadhasivam@linaro.org
Headers show
Series Add support for Thor96 board | expand

Message

Manivannan Sadhasivam Oct. 30, 2019, 9:01 a.m. UTC
Hello,

This patchset adds support for Thor96 board from Einfochips. This board is
one of the 96Boards Consumer Edition platform powered by the NXP i.MX8MQ
SoC.

Following are the features supported currently:

1. uSD
2. WiFi/BT
3. Ethernet
4. EEPROM (M24256)
5. NOR Flash (W25Q256JW)
6. 2xUSB3.0 ports and 1xUSB2.0 port at HS expansion

More information about this board can be found in Arrow website:
https://www.arrow.com/en/products/i.imx8-thor96/arrow-development-tools

Link to 96Boards CE Specification: https://linaro.co/ce-specification

Expecting patch 1 to go through LED/Rob's tree, 4 through MTD tree
and 2,3 through Freescale tree.

Thanks,
Mani

Changes in v2:

* Added patch for documenting commonly used LED triggers
* Added Reviewed-by tags for bindings patch
* Changed, fsl,uart-has-rtscts to uart-has-rtscts in dts
* Modified the commit message of MTD patch

Manivannan Sadhasivam (4):
  dt-bindings: leds: Document commonly used LED triggers
  dt-bindings: arm: Add devicetree binding for Thor96 Board
  arm64: dts: freescale: Add devicetree support for Thor96 board
  mtd: spi-nor: Add support for w25q256jw

 .../devicetree/bindings/arm/fsl.yaml          |   1 +
 .../devicetree/bindings/leds/common.txt       |  17 +
 arch/arm64/boot/dts/freescale/Makefile        |   1 +
 .../boot/dts/freescale/imx8mq-thor96.dts      | 581 ++++++++++++++++++
 drivers/mtd/spi-nor/spi-nor.c                 |   2 +
 5 files changed, 602 insertions(+)
 create mode 100644 arch/arm64/boot/dts/freescale/imx8mq-thor96.dts

-- 
2.17.1

Comments

Tudor Ambarus Nov. 1, 2019, 1:48 p.m. UTC | #1
On 10/30/2019 11:01 AM, Manivannan Sadhasivam wrote:
> External E-Mail

> 

> 

> Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip

> supports dual/quad I/O mode with 512 blocks of memory organized in

> 64KB sectors. In addition to this, there is also small 4KB sectors

> available for flexibility. The device has been validated using Thor96

> board.

> 

> Cc: Marek Vasut <marek.vasut@gmail.com>

> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>

> Cc: David Woodhouse <dwmw2@infradead.org>

> Cc: Brian Norris <computersforpeace@gmail.com>

> Cc: Miquel Raynal <miquel.raynal@bootlin.com>

> Cc: Richard Weinberger <richard@nod.at>

> Cc: Vignesh Raghavendra <vigneshr@ti.com>

> Cc: linux-mtd@lists.infradead.org

> Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>

> [Mani: cleaned up for upstream]


Can we keep Darshak's authorship? We usually change the author if we feel that
we made a significant change to what was originally published.

If it's just about cosmetics, cleaning or rebase, you can specify what you did
after the author's S-o-b tag and then add your S-o-b, as you did above.

The patch looks good.

Cheers,
ta

> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> ---

>  drivers/mtd/spi-nor/spi-nor.c | 2 ++

>  1 file changed, 2 insertions(+)

> 

> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c

> index 1d8621d43160..2c25b371d9f0 100644

> --- a/drivers/mtd/spi-nor/spi-nor.c

> +++ b/drivers/mtd/spi-nor/spi-nor.c

> @@ -2482,6 +2482,8 @@ static const struct flash_info spi_nor_ids[] = {

>  	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

>  	{ "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,

>  			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

> +	{ "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512,

> +			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

>  	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,

>  			SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },

>  

>
Manivannan Sadhasivam Nov. 1, 2019, 2:58 p.m. UTC | #2
Hi Tudor,

On Fri, Nov 01, 2019 at 01:48:17PM +0000, Tudor.Ambarus@microchip.com wrote:
> 

> 

> On 10/30/2019 11:01 AM, Manivannan Sadhasivam wrote:

> > External E-Mail

> > 

> > 

> > Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip

> > supports dual/quad I/O mode with 512 blocks of memory organized in

> > 64KB sectors. In addition to this, there is also small 4KB sectors

> > available for flexibility. The device has been validated using Thor96

> > board.

> > 

> > Cc: Marek Vasut <marek.vasut@gmail.com>

> > Cc: Tudor Ambarus <tudor.ambarus@microchip.com>

> > Cc: David Woodhouse <dwmw2@infradead.org>

> > Cc: Brian Norris <computersforpeace@gmail.com>

> > Cc: Miquel Raynal <miquel.raynal@bootlin.com>

> > Cc: Richard Weinberger <richard@nod.at>

> > Cc: Vignesh Raghavendra <vigneshr@ti.com>

> > Cc: linux-mtd@lists.infradead.org

> > Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>

> > [Mani: cleaned up for upstream]

> 

> Can we keep Darshak's authorship? We usually change the author if we feel that

> we made a significant change to what was originally published.

> 

> If it's just about cosmetics, cleaning or rebase, you can specify what you did

> after the author's S-o-b tag and then add your S-o-b, as you did above.

> 


I'd suggest to keep Darshak's authorship since he did the actual change in
the bsp. I have to clean it up before submitting upstream and I mentioned
the same above.

> The patch looks good.

> 


Thanks,
Mani

> Cheers,

> ta

> 

> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> > ---

> >  drivers/mtd/spi-nor/spi-nor.c | 2 ++

> >  1 file changed, 2 insertions(+)

> > 

> > diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c

> > index 1d8621d43160..2c25b371d9f0 100644

> > --- a/drivers/mtd/spi-nor/spi-nor.c

> > +++ b/drivers/mtd/spi-nor/spi-nor.c

> > @@ -2482,6 +2482,8 @@ static const struct flash_info spi_nor_ids[] = {

> >  	{ "w25q256", INFO(0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

> >  	{ "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512,

> >  			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

> > +	{ "w25q256jw", INFO(0xef6019, 0, 64 * 1024, 512,

> > +			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },

> >  	{ "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024,

> >  			SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) },

> >  

> >
Tudor Ambarus Nov. 1, 2019, 3:55 p.m. UTC | #3
On 11/01/2019 04:58 PM, Manivannan Sadhasivam wrote:
>>> Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip

>>> supports dual/quad I/O mode with 512 blocks of memory organized in

>>> 64KB sectors. In addition to this, there is also small 4KB sectors

>>> available for flexibility. The device has been validated using Thor96

>>> board.

>>>

>>> Cc: Marek Vasut <marek.vasut@gmail.com>

>>> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>

>>> Cc: David Woodhouse <dwmw2@infradead.org>

>>> Cc: Brian Norris <computersforpeace@gmail.com>

>>> Cc: Miquel Raynal <miquel.raynal@bootlin.com>

>>> Cc: Richard Weinberger <richard@nod.at>

>>> Cc: Vignesh Raghavendra <vigneshr@ti.com>

>>> Cc: linux-mtd@lists.infradead.org

>>> Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>

>>> [Mani: cleaned up for upstream]

>> Can we keep Darshak's authorship? We usually change the author if we feel that

>> we made a significant change to what was originally published.

>>

>> If it's just about cosmetics, cleaning or rebase, you can specify what you did

>> after the author's S-o-b tag and then add your S-o-b, as you did above.

>>

> I'd suggest to keep Darshak's authorship since he did the actual change in

> the bsp. I have to clean it up before submitting upstream and I mentioned

> the same above.

> 


Ok, I'll amend the author when applying, it will be Darshak.

Thanks,
ta
Rob Herring Nov. 5, 2019, 10:04 p.m. UTC | #4
On Wed, Oct 30, 2019 at 02:31:21PM +0530, Manivannan Sadhasivam wrote:
> This commit documents the LED triggers used commonly in the SoCs. Not

> all triggers are documented as some of them are very application specific.

> Most of the triggers documented here are currently used in devicetrees

> of many SoCs.


I guess it's worth documenting these, but you plan to use 'function' 
instead, right?

> 

> Cc: Jacek Anaszewski <jacek.anaszewski@gmail.com>

> Cc: Pavel Machek <pavel@ucw.cz>

> Cc: Dan Murphy <dmurphy@ti.com>

> Cc: linux-leds@vger.kernel.org

> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> ---

>  .../devicetree/bindings/leds/common.txt         | 17 +++++++++++++++++

>  1 file changed, 17 insertions(+)


Acked-by: Rob Herring <robh@kernel.org>


> 

> diff --git a/Documentation/devicetree/bindings/leds/common.txt b/Documentation/devicetree/bindings/leds/common.txt

> index 9fa6f9795d50..2a6806161590 100644

> --- a/Documentation/devicetree/bindings/leds/common.txt

> +++ b/Documentation/devicetree/bindings/leds/common.txt

> @@ -55,6 +55,23 @@ Optional properties for child nodes:

>       "timer" - LED flashes at a fixed, configurable rate

>       "pattern" - LED alters the brightness for the specified duration with one

>                   software timer (requires "led-pattern" property)

> +     "mmc[N]" - LED indicates [N]th MMC storage activity

> +     "flash" - LED indicates camera flash state

> +     "torch" - LED indicates camera torch state

> +     "audio-mute" - LED indicates audio mute state

> +     "audio-micmute" - LED indicates mic mute state

> +     "bluetooth-power" - LED indicates bluetooth power state

> +     "usb-gadget" - LED indicates USB gadget activity

> +     "usb-host" - LED indicates USB host activity

> +     "mtd" - LED indicates MTD memory activity

> +     "nand-disk" - LED indicates NAND memory activity (deprecated),

> +                  in new implementations use "mtd"

> +     "disk-read" - LED indicates disk read activity

> +     "disk-write" - LED indicates disk write activity

> +     "none" - No trigger assigned to the LED. This is the default mode

> +              if trigger is absent

> +     "cpu" - LED indicates activity of all CPUs

> +     "cpu[N]" - LED indicates activity of [N]th CPU

>  

>  - led-pattern : Array of integers with default pattern for certain triggers.

>                  Each trigger may parse this property differently:

> -- 

> 2.17.1

>
Manivannan Sadhasivam Nov. 7, 2019, 12:40 p.m. UTC | #5
On Thu, Nov 07, 2019 at 12:30:05PM +0000, Tudor.Ambarus@microchip.com wrote:
> 

> 

> On 11/01/2019 06:09 PM, Manivannan Sadhasivam wrote:

> >> On 11/01/2019 04:58 PM, Manivannan Sadhasivam wrote:

> >>>>> Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip

> >>>>> supports dual/quad I/O mode with 512 blocks of memory organized in

> >>>>> 64KB sectors. In addition to this, there is also small 4KB sectors

> >>>>> available for flexibility. The device has been validated using Thor96

> >>>>> board.

> >>>>>

> >>>>> Cc: Marek Vasut <marek.vasut@gmail.com>

> >>>>> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>

> >>>>> Cc: David Woodhouse <dwmw2@infradead.org>

> >>>>> Cc: Brian Norris <computersforpeace@gmail.com>

> >>>>> Cc: Miquel Raynal <miquel.raynal@bootlin.com>

> >>>>> Cc: Richard Weinberger <richard@nod.at>

> >>>>> Cc: Vignesh Raghavendra <vigneshr@ti.com>

> >>>>> Cc: linux-mtd@lists.infradead.org

> >>>>> Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>

> >>>>> [Mani: cleaned up for upstream]

> >>>> Can we keep Darshak's authorship? We usually change the author if we feel that

> >>>> we made a significant change to what was originally published.

> >>>>

> >>>> If it's just about cosmetics, cleaning or rebase, you can specify what you did

> >>>> after the author's S-o-b tag and then add your S-o-b, as you did above.

> >>>>

> >>> I'd suggest to keep Darshak's authorship since he did the actual change in

> >>> the bsp. I have to clean it up before submitting upstream and I mentioned

> >>> the same above.

> >>>

> >> Ok, I'll amend the author when applying, it will be Darshak.

> >>

> > Ah no. I was saying we should keep both of ours authorship. It shouldn't

> > be an issue because we both are involved in the process.

> 

> There can be only one author in a patch, and multiple signers if needed:

> 

> Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> Date:   Wed Oct 30 14:31:24 2019 +0530

> 

>     mtd: spi-nor: Add support for w25q256jw

> [cut]

>     Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>

>     [Mani: cleaned up for upstream]

>     Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> 

> Please read

> https://www.kernel.org/doc/html/v5.3/process/submitting-patches.html, paragraph

> 11), and tell me if you want me to amend the author to keep Darshak's authorship

> or you want to keep yours.


Just keep me as the author of this patch. Darshak still gets credit with his
signed-off-by tag.

Sorry for the confusion!

Thanks,
Mani
Tudor Ambarus Nov. 11, 2019, 7:31 p.m. UTC | #6
On 10/30/2019 11:01 AM, Manivannan Sadhasivam wrote:
> Add MTD support for w25q256jw SPI NOR chip from Winbond. This chip

> supports dual/quad I/O mode with 512 blocks of memory organized in

> 64KB sectors. In addition to this, there is also small 4KB sectors

> available for flexibility. The device has been validated using Thor96

> board.

> 

> Cc: Marek Vasut <marek.vasut@gmail.com>

> Cc: Tudor Ambarus <tudor.ambarus@microchip.com>

> Cc: David Woodhouse <dwmw2@infradead.org>

> Cc: Brian Norris <computersforpeace@gmail.com>

> Cc: Miquel Raynal <miquel.raynal@bootlin.com>

> Cc: Richard Weinberger <richard@nod.at>

> Cc: Vignesh Raghavendra <vigneshr@ti.com>

> Cc: linux-mtd@lists.infradead.org

> Signed-off-by: Darshak Patel <darshak.patel@einfochips.com>

> [Mani: cleaned up for upstream]

> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> ---

>  drivers/mtd/spi-nor/spi-nor.c | 2 ++

>  1 file changed, 2 insertions(+)


Applied to spi-nor/next. Thanks.