From patchwork Wed Dec 11 23:07:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mike Leach X-Patchwork-Id: 181355 Delivered-To: patch@linaro.org Received: by 2002:a92:3001:0:0:0:0:0 with SMTP id x1csp137176ile; Wed, 11 Dec 2019 15:07:27 -0800 (PST) X-Google-Smtp-Source: APXvYqzhy2qU3az881C++3cR1wQv5QjbHTB5fkb9cjK5l/PF8HuXatpHqmkaUSm1oeDKyZLDoqaJ X-Received: by 2002:a05:6830:9:: with SMTP id c9mr4571703otp.94.1576105647513; Wed, 11 Dec 2019 15:07:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1576105647; cv=none; d=google.com; s=arc-20160816; b=nGHmd1zYm4dWbTYO9Y9zksEEVFVsg8bRxeIrOhS2f+B6yzuni0iN5BtAKPTvgW6sd9 y0tWsIxPcWzuW6wQuvPTYpCtiYVukMilD1nLwInx/reBIgJtsbQ3yICmYDpIGaBl8XQo /SmuriPFP5Rv3d9W/VRLUfLn2qXb6TTvie0WT7MR2AvbO+tLWMUfTQO3mbBe4LZGZ9Lm 9LyAI3J+ppd2UIUG9u6DcGlD3FsLEkcZgHeVxPLY/Zhl7fs9fwi/NT6CJxTpLFpMsudP HsgBNXYvnRnPegKlGsWRMw0RDEsE0E9M7q23fbT52NP6dlLIF3naalm+lnyysXDjL+J7 IiEA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature; bh=aXwQ1iASMVU8nMln3fgZ+uQBpHFldawKoRvB34MJ2Ks=; b=ODMiFJjocCQHJYx3qpc37HZSgtaE+jp/3i1hQkB5B5aSvw3P6Yn6tCThxbe6iIbZa6 0aiJaawqGMG9AweXN4p90Pv5vET02FbhVew+M+wgga8ldJaUv1CgFBSdJA1VwNxK06Rr wBaBTyr9blIe9ZxGZ0i+vL3Z2WvzT5kor8qfON0hndhTsTyRFuFKXcKfhIvbmiI7yTPN +u6DTi9xuh56fwy61VBIvcrG5l3Zt9v10Bwp8vjdLqH1twIpeUU9hf47zTF9lQQaAnWC nz7GcnVsiHJRoAAP81XMDDUs0l7nFYLuJht8PIH602xxa9mDXHJx8mbxCPH7Qo5kNhrr V2AQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wrVAd/0k"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l17si1963642otn.220.2019.12.11.15.07.26; Wed, 11 Dec 2019 15:07:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wrVAd/0k"; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726313AbfLKXH0 (ORCPT + 8 others); Wed, 11 Dec 2019 18:07:26 -0500 Received: from mail-wm1-f52.google.com ([209.85.128.52]:36374 "EHLO mail-wm1-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726141AbfLKXH0 (ORCPT ); Wed, 11 Dec 2019 18:07:26 -0500 Received: by mail-wm1-f52.google.com with SMTP id p17so170395wma.1 for ; Wed, 11 Dec 2019 15:07:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=aXwQ1iASMVU8nMln3fgZ+uQBpHFldawKoRvB34MJ2Ks=; b=wrVAd/0kfzKJ/tpxCPXyCQBezs+bi6gO+2qMIvhsz2fy+c3MMEmJ0T0Y6SBGk3AvLv lYTzFezN3gulnHtix2x5ATi5GgymSn2QhcBJ2SUriZDnGFSb7/XFIiQjTwInF/0tF2U2 b5Ya9TkX/OTnm1n/bFgyyqEW4YaA1t2U2XMQnDHgUYHw1mBvexWiyDR6z7O058seh9/r 5UTJaKIW3WG0MdV1jmXtWYAZqP/GBwmF2L4qEpOrlGvaBiHvGOMz6d8SNm3bzk25wF4E NOGkCeB0IlQFBcjNupo/ycqLKF8F8mTGoYLPQwvAIkh0wV8VeQbw17tqz29LiTsDI4m6 Xa+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=aXwQ1iASMVU8nMln3fgZ+uQBpHFldawKoRvB34MJ2Ks=; b=n4N6t0brMBCkAY/AlzDa2QPHmHRvWQhXSfVB9QIn7jBgiEY3qSzC4kYfysd2RXOVOQ 6JpuIGkTRDeMdgSXMlRoms2D6dzgYYwBdT9zlYencCl7/jZmkiYF9dbbexSSQ2N8ypCx qJk3aOFZstX4zJeFkipb0UUCN7qvQAywJVunbfRuVtaHIyvapeM8ZyneXy+pXfHDcIfO ADDXZrjJ5XwAqObodLSn+sKyDy8NnGZ6WHXMkUMLlA1QnrmdgJ1DvutWx7cVU8gViZny 1RFUSnZdL4VP5PHIFKJNAdXaim8RdeNZUslvV46PU8sSwvGiz5eb7F7eS5ueowwx7KDv Ld5g== X-Gm-Message-State: APjAAAVHul33s1Dhi7p+sbtZdJ8lZieJUsfsFyPZYS+1brA2Rc/SjwDm CEby3p35nTO7mGEZ+kI6SQ9HBg== X-Received: by 2002:a1c:6585:: with SMTP id z127mr2535411wmb.113.1576105642857; Wed, 11 Dec 2019 15:07:22 -0800 (PST) Received: from linaro.org ([2a00:23c5:6815:3901:140f:3f8d:647c:49b0]) by smtp.gmail.com with ESMTPSA id z12sm3962480wmd.16.2019.12.11.15.07.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 15:07:22 -0800 (PST) From: Mike Leach To: mike.leach@linaro.org, linux-arm-kernel@lists.infradead.org, coresight@lists.linaro.org, devicetree@vger.kernel.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com, robh+dt@kernel.org, liviu.dudau@arm.com, sudeep.holla@arm.com, lorenzo.pieralisi@arm.com, agross@kernel.org Subject: [PATCH v6 00/15] CoreSight CTI Driver Date: Wed, 11 Dec 2019 23:07:17 +0000 Message-Id: <20191211230717.4879-1-mike.leach@linaro.org> X-Mailer: git-send-email 2.17.1 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org CTIs are defined in the device tree and associated with other CoreSight devices. The core CoreSight code has been modified to enable the registration of the CTI devices on the same bus as the other CoreSight components, but as these are not actually trace generation / capture devices, they are not part of the Coresight path when generating trace. However, the definition of the standard CoreSight device has been extended to include a reference to an associated CTI device, and the enable / disable trace path operations will auto enable/disable any associated CTI devices at the same time. Programming is at present via sysfs - a full API is provided to utilise the hardware capabilities. As CTI devices are unprogrammed by default, the auto enable describe above will have no effect until explicit programming takes place. A set of device tree bindings specific to the CTI topology has been defined. The driver accesses these in a platform agnostic manner, so ACPI bindings can be added later, once they have been agreed and defined for the CTI device. Documentation has been updated to describe both the CTI hardware, its use and programming in sysfs, and the new dts bindings required. Tested on DB410 board and Juno board, against the Linux 5.5-rc1 tree. Changes since v5: 1) Fixed up device tree .yaml file. Using extra compatible string for v8 architecture CTI connections. 2) Ensure association code respects coresight mutex when setting cross referenced pointers. Add in shutdown code. 3) Multiple minor code fixes & rationalisation. Changes since v4: Multiple changes following feedback from Mathieu, Leo and Suzuki. 1) Dropped RFC tag - wider distribution 2) CTI bindings definition now presented as a .yaml file - tested with with 'dt-doc-validate' from devicetree.org/dt-schema project and in kernel build tree with 'make dtbs_check' per kernel docs. 3) Sysfs links to other CoreSight devices moved out of this set into a following set that deals with all CoreSight devices & sysfs links. 4) Documentation in .rst format and new directory following patchset in [1]. Extended example provided in docs. 5) Rationalised devicetree of_ specifics to use generic fwnode functions where possible to enable easier addition of ACPI support later. 6) Other minor changes as requested in feedback from last patchset. Changes since v3: 1) After discussion on CS mailing list, each CTI connection has a triggers sysfs directory with name and trigger signals listed for the connection. 2) Initial code for creating sysfs links between CoreSight components is introduced and implementation for CTI provided. This allows exploration of the CoreSight topology within the sysfs infrastructure. Patches for links between other CoreSight components to follow. 3) Power management - CPU hotplug and idle omitted from this set as ongoing developments may define required direction. Additional patch set to follow. 4) Multiple fixes applied as requested by reviewers esp. Matthieu, Suzuki and Leo. Changes since v2: Updates to allow for new features on coresight/next and feedback from Mathieu and Leo. 1) Rebase and restructuring to apply on top of ACPI support patch set, currently on coresight/next. of_coresight_cti has been renamed to coresight-cti-platform and device tree bindings added to this but accessed in a platform agnostic manner using fwnode for later ACPI support to be added. 2) Split the sysfs patch info a series of functional patches. 3) Revised the refcount and enabling support. 4) Adopted the generic naming protocol - CTIs are either cti_cpuN or cti_sysM 5) Various minor presentation /checkpatch issues highlighted in feedback. 6) revised CPU hotplug to cover missing cases needed by ETM. Changes since v1: 1) Significant restructuring of the source code. Adds cti-sysfs file and cti device tree file. Patches add per feature rather than per source file. 2) CPU type power event handling for hotplug moved to CoreSight core, with generic registration interface provided for all CPU bound CS devices to use. 3) CTI signal interconnection details in sysfs now generated dynamically from connection lists in driver. This to fix issue with multi-line sysfs output in previous version. 4) Full device tree bindings for DB410 and Juno provided (to the extent that CTI information is available). 5) AMBA driver update for UCI IDs are now upstream so no longer included in this set. Mike Leach (15): coresight: cti: Initial CoreSight CTI Driver coresight: cti: Add sysfs coresight mgmt reg access. coresight: cti: Add sysfs access to program function regs coresight: cti: Add sysfs trigger / channel programming API dt-bindings: arm: Adds CoreSight CTI hardware definitions. coresight: cti: Add device tree support for v8 arch CTI coresight: cti: Add device tree support for custom CTI. coresight: cti: Enable CTI associated with devices. coresight: cti: Add connection information to sysfs dt-bindings: qcom: Add CTI options for qcom msm8916 dt-bindings: arm: Juno platform - add CTI entries to device tree. dt-bindings: hisilicon: Add CTI bindings for hi-6220 docs: coresight: Update documentation for CoreSight to cover CTI. docs: sysfs: coresight: Add sysfs ABI documentation for CTI Update MAINTAINERS to add reviewer for CoreSight. .../testing/sysfs-bus-coresight-devices-cti | 221 ++++ .../bindings/arm/coresight-cti.yaml | 303 +++++ .../devicetree/bindings/arm/coresight.txt | 7 + .../trace/coresight/coresight-ect.rst | 211 +++ Documentation/trace/coresight/coresight.rst | 13 + MAINTAINERS | 3 + arch/arm64/boot/dts/arm/juno-base.dtsi | 149 ++- arch/arm64/boot/dts/arm/juno-cs-r1r2.dtsi | 31 +- arch/arm64/boot/dts/arm/juno-r1.dts | 25 + arch/arm64/boot/dts/arm/juno-r2.dts | 25 + arch/arm64/boot/dts/arm/juno.dts | 25 + .../boot/dts/hisilicon/hi6220-coresight.dtsi | 130 +- arch/arm64/boot/dts/qcom/msm8916.dtsi | 85 +- drivers/hwtracing/coresight/Kconfig | 21 + drivers/hwtracing/coresight/Makefile | 3 + .../coresight/coresight-cti-platform.c | 485 +++++++ .../hwtracing/coresight/coresight-cti-sysfs.c | 1175 +++++++++++++++++ drivers/hwtracing/coresight/coresight-cti.c | 748 +++++++++++ drivers/hwtracing/coresight/coresight-cti.h | 235 ++++ .../hwtracing/coresight/coresight-platform.c | 21 + drivers/hwtracing/coresight/coresight-priv.h | 15 + drivers/hwtracing/coresight/coresight.c | 86 +- include/dt-bindings/arm/coresight-cti-dt.h | 37 + include/linux/coresight.h | 27 + 24 files changed, 4050 insertions(+), 31 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-devices-cti create mode 100644 Documentation/devicetree/bindings/arm/coresight-cti.yaml create mode 100644 Documentation/trace/coresight/coresight-ect.rst create mode 100644 drivers/hwtracing/coresight/coresight-cti-platform.c create mode 100644 drivers/hwtracing/coresight/coresight-cti-sysfs.c create mode 100644 drivers/hwtracing/coresight/coresight-cti.c create mode 100644 drivers/hwtracing/coresight/coresight-cti.h create mode 100644 include/dt-bindings/arm/coresight-cti-dt.h -- 2.17.1