From patchwork Wed Sep 30 15:09:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 313901 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:1081:0:0:0:0 with SMTP id r1csp295891ilj; Wed, 30 Sep 2020 08:09:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDObjJmNagNsChfGrf2E13rx7MihGVSMuCXdXPga29tClolIWP6sRRs89srl70TXcdJ7R5 X-Received: by 2002:a17:906:7695:: with SMTP id o21mr3261137ejm.176.1601478586070; Wed, 30 Sep 2020 08:09:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601478586; cv=none; d=google.com; s=arc-20160816; b=xWWVzXIWJU7Spj/EE6S+OAJ+YJMd83tNMzQ4eOnWEgmxqeIo76mX+277wIy5GHnobG K0lT9LFGyMidJRZKdxZ+W07r4/YuB51gdWq97Y3W3HyrutpYPw5EnNLqIo/K6o4GBpYh V4slyzk0uii+aEFFxU+Sel6yvP4JiEMjYbLQ4Ht12S3Vt5Sy2ltXcFMcWRAoSSJeeQ6l 39hxEcPapgEFB2wm2Ej7mvwbloC+6VLlmBGPMlrwMFFnCiqgVQXr0UT8C3btdN9ICCkJ fgBKDXFio+75vo9Q7H5NmpWQvJKMP23L9DgukPFBKPP8w+4SkSSB/rQUHOHMVvPHaj7U Mc4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from :dkim-signature; bh=Om10yAB3QUkq2FUUZylEInes0EqFhXB8HTZobg+GBGk=; b=D1aUhbd7c8GxpIha3jVmXxWqroCJFT8Wzc/eGyCC2BeJYSr4lQq025UEGNCWOwqg+m zq+ArhqA5LtC8WUGrCKAkNHWUOf2+7nUi4ehVTL9Zuk18Q/PRPiiSQF2RkIEgnYquAEg 5ct3fBrvbifsFsRlKyaZaHJE6nyiJA4l4zEPXXvRYoROekSUKYXfl/Q9iYAVQiDZv5NC 89qjKdhjRPD5HL8JPz4J/Fh/fk99GZHhOh1Oof1Z0VLezGSkmLEhBOtNzO8mKM1ejrCB 4WdsldW9Kjr7aJmKClrW+06dAr3+W9cychuCRMFA5Stcn35dv93xV37zA+sR1io/Y3Yo FXlA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kflbF4Nl; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g10si1397625edv.314.2020.09.30.08.09.45; Wed, 30 Sep 2020 08:09:46 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kflbF4Nl; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725385AbgI3PJp (ORCPT + 6 others); Wed, 30 Sep 2020 11:09:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39160 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725799AbgI3PJp (ORCPT ); Wed, 30 Sep 2020 11:09:45 -0400 Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20384C0613D2 for ; Wed, 30 Sep 2020 08:09:45 -0700 (PDT) Received: by mail-pl1-x644.google.com with SMTP id o8so1207478pll.4 for ; Wed, 30 Sep 2020 08:09:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Om10yAB3QUkq2FUUZylEInes0EqFhXB8HTZobg+GBGk=; b=kflbF4NlTnp2PESdD8BUBhu3JL0K8pD4BA1XjDG4/f9HDlZ/OYZTv9aR7ROzSGYq4J /I79gOi98pcQdXq0FBwC/lmIdkUP3k245R+Hgbqq/pYwRdJwLzbbEx5jm1uC7XqalOQD yC3LvtiQch5RACmPxHMSumm4tfKCvXlZ53QU8ELr794bGUPli/10pHrmStU0Vm7DWTWe l15uvk+qZV6En/MqpXEEenV2vjZL7HC6OFN6F5JXNsM6+JHwYupS2SOfwD6XkR6/REUy 8ddmUS5IXf2Fmh7SM2NxWaaw6oQKhgtpuFb3aiqUNYMoR3EqqOQqXPVcS/LB3OBQBIUk rLzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Om10yAB3QUkq2FUUZylEInes0EqFhXB8HTZobg+GBGk=; b=O8vh/ZJbOly9kr1yJ9bVXhItpnmrkTCcOIOeG7qXjpPPdt0Tjg8tWeqIq0QXhm07Kp 76D+6hPCoPT32eYZxGlfiM/tVRnijSHs8w6T5A5X2F4eUksGlZjRfhi382LTVkFkAqLt FipmR+Yx3HA19FlKlumRmgdwypdyGjUTiuz70t7FNDxqEqFOzfYPMObdBIlf7DFVwmmj 8bton5litFQTVj/iI7CqoQBD8IuDUWyEofcKnMa5i1XKo34bS0AluNhe+VTnKtKOzXPR nhAy2t4YWUG3NLLpvm/YkWIYsA5fX7EXCJdv8ehlGUlhESV92PcSIh5Kw2VjzsYRtK7v LHYA== X-Gm-Message-State: AOAM532sX8m4smI2yrJOSq6B8/1FNkIjfpf1B8frdJdH33qjVHKA1RGh sA8s4DjRO4aXY3bS7drPriXV X-Received: by 2002:a17:902:ee93:b029:d2:1425:7c90 with SMTP id a19-20020a170902ee93b02900d214257c90mr2630408pld.30.1601478584438; Wed, 30 Sep 2020 08:09:44 -0700 (PDT) Received: from Mani-XPS-13-9360.localdomain ([2409:4072:6004:2356:f1f4:5bc8:894a:8c50]) by smtp.gmail.com with ESMTPSA id o6sm2456444pjp.33.2020.09.30.08.09.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2020 08:09:43 -0700 (PDT) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org, kishon@ti.com, vkoul@kernel.org, robh@kernel.org Cc: svarbanov@mm-sol.com, bhelgaas@google.com, lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, mgautam@codeaurora.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 0/5] Add PCIe support for SM8250 SoC Date: Wed, 30 Sep 2020 20:39:20 +0530 Message-Id: <20200930150925.31921-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, This series adds PCIe support for Qualcomm SM8250 SoC with relevant PHYs. There are 3 PCIe instances on this SoC each with different PHYs. The PCIe controller and PHYs are mostly comaptible with the ones found on SDM845 SoC, hence the old drivers are modified to add the support. This series has been tested on RB5 board with QCA6390 chipset connected onboard. NOTE: This series functionally depends on the following patch: https://lore.kernel.org/linux-arm-kernel/1599814203-14441-3-git-send-email-hayashi.kunihiko@socionext.com/ I've dropped a similar patch in v2. Thanks, Mani Changes in v2: * Fixed the PHY and PCIe bindings * Introduced secondary table in PHY driver to abstract out the common configs. * Used a more generic way of configuring BDF to SID mapping * Dropped ATU change in favor of a patch spotted by Rob Manivannan Sadhasivam (5): dt-bindings: phy: qcom,qmp: Add SM8250 PCIe PHY bindings phy: qcom-qmp: Add SM8250 PCIe QMP PHYs dt-bindings: pci: qcom: Document PCIe bindings for SM8250 SoC PCI: qcom: Add SM8250 SoC support PCI: qcom: Add support for configuring BDF to SID mapping for SM8250 .../devicetree/bindings/pci/qcom,pcie.txt | 6 +- .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 6 + drivers/pci/controller/dwc/Kconfig | 1 + drivers/pci/controller/dwc/pcie-qcom.c | 149 ++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.c | 278 +++++++++++++++++- drivers/phy/qualcomm/phy-qcom-qmp.h | 18 ++ 6 files changed, 454 insertions(+), 4 deletions(-) -- 2.17.1