From patchwork Wed Jan 13 09:39:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 362066 Delivered-To: patch@linaro.org Received: by 2002:a02:ccad:0:0:0:0:0 with SMTP id t13csp364107jap; Wed, 13 Jan 2021 01:43:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJwWfbmNGv97sZwBc6Bu+EyWvOw2oSQdjdJ15JZ836/D2Nwizi7AuaMlaEOiC6ajZG6uhaCZ X-Received: by 2002:a17:907:43f6:: with SMTP id mu6mr1015406ejb.79.1610530983871; Wed, 13 Jan 2021 01:43:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1610530983; cv=none; d=google.com; s=arc-20160816; b=FmLZs70tng32M7RhH/m7dgyWdCZPCjoT9mbqk6TaA2JdvE6VyNAoVLHJj3CM8Ftjn6 afrw6KEYb/zy6UDWnzHJi/r3R7p6ZHOE7ZkerpxBa8t4E0fmdMvqR8vZgebH0bUKyffQ R5q5Z9iEF6bwSRMNTsg6LpDjIVt8mspv2QoMYsWy4PnKnNCopguTCh34WoacBw+uz72Q CJihW8biLgXu4rLsGKBX98Ak649Jv+CYgQ1lutQOrle8OkPxe/Dl/8gi0ayfJk+aNca8 2UuhRWFxnDr6a7N6VQUg+xtcroOwxyiJfji8/YLiAIFwDJ4p/y8PUsULqmC6Ko3xS5xq 83Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=SnMisPBIAdFvpnN9mz1PRGjURG5B/dRHp4Tt3bhUZyk=; b=TEZbWi63ByLbj/pDxSVGo7o8td0w3FXbaNkooAWlV6mD4cS3IGAdaTS8MBkMft4FKT UCCdydjHHbrx2n/k3QdV5369mcO1Kmvzw2g5QvJkAYvldga07CUjaxoZmXMgTD7lrD31 Plcm/4uICF6eLnvJ5FsnIxJzOZUkzyQY1lpwX5W7jE4VgY+mT8mv+idbsZOzT/6uK7E9 ZVVPdPDN9KzmsS2CCK2PTvrPo9QWPfb2Z6eCC+7aOcUwAoh5H0DVYj7HgQGc3ZCIfDbt NZTpkQy9sjoknNdYkGCiGRrgxvSkszIWF6LgzcOVEawwFZIhtDSu/C8qRWHP9V7/aOFA IQdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f1si681859ejd.696.2021.01.13.01.43.03; Wed, 13 Jan 2021 01:43:03 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727157AbhAMJl3 (ORCPT + 6 others); Wed, 13 Jan 2021 04:41:29 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:11009 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726974AbhAMJl2 (ORCPT ); Wed, 13 Jan 2021 04:41:28 -0500 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4DG2Ts1Kjxzj6cM; Wed, 13 Jan 2021 17:39:45 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.176.220) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.498.0; Wed, 13 Jan 2021 17:40:38 +0800 From: Zhen Lei To: Russell King , Greg Kroah-Hartman , Will Deacon , "Haojian Zhuang" , Arnd Bergmann , Rob Herring , Wei Xu , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei Subject: [PATCH v4 0/3] ARM: Add support for Hisilicon Kunpeng L3 cache controller Date: Wed, 13 Jan 2021 17:39:39 +0800 Message-ID: <20210113093942.809-1-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.174.176.220] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org v3 --> v4: Rename the compatible string from "hisilicon,l3cache" to "hisilicon,kunpeng-l3cache". Then adjust the file name, configuration option name, and description accordingly. v2 --> v3: Add Hisilicon L3 cache controller driver and its document. That's: patch 2-3. v1 --> v2: Discard the middle-tier functions and do silent narrowing cast in the outcache hook functions. For example: -static void l2c220_inv_range(unsigned long start, unsigned long end) +static void l2c220_inv_range(phys_addr_t pa_start, phys_addr_t pa_end) { + unsigned long start = pa_start; + unsigned long end = pa_end; v1: Do cast phys_addr_t to unsigned long by adding a middle-tier function. For example: -static void l2c220_inv_range(unsigned long start, unsigned long end) +static void __l2c220_inv_range(unsigned long start, unsigned long end) { ... } +static void l2c220_inv_range(phys_addr_t start, phys_addr_t end) +{ + __l2c220_inv_range(start, end); +} Zhen Lei (3): ARM: LPAE: Use phys_addr_t instead of unsigned long in outercache hooks dt-bindings: arm: hisilicon: Add binding for Kunpeng L3 cache controller ARM: Add support for Hisilicon Kunpeng L3 cache controller .../arm/hisilicon/kunpeng-l3cache.yaml | 37 +++++ arch/arm/include/asm/outercache.h | 6 +- arch/arm/mm/Kconfig | 10 ++ arch/arm/mm/Makefile | 1 + arch/arm/mm/cache-feroceon-l2.c | 15 +- arch/arm/mm/cache-kunpeng-l3.c | 153 ++++++++++++++++++ arch/arm/mm/cache-kunpeng-l3.h | 30 ++++ arch/arm/mm/cache-l2x0.c | 50 ++++-- arch/arm/mm/cache-tauros2.c | 15 +- arch/arm/mm/cache-uniphier.c | 6 +- arch/arm/mm/cache-xsc3l2.c | 12 +- 11 files changed, 306 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/kunpeng-l3cache.yaml create mode 100644 arch/arm/mm/cache-kunpeng-l3.c create mode 100644 arch/arm/mm/cache-kunpeng-l3.h -- 2.26.0.106.g9fadedd