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[V5,0/4] soc: imx: add i.MX BLK-CTL support

Message ID 20210521105919.20167-1-peng.fan@oss.nxp.com
Headers show
Series soc: imx: add i.MX BLK-CTL support | expand

Message

Peng Fan (OSS) May 21, 2021, 10:59 a.m. UTC
From: Peng Fan <peng.fan@nxp.com>


V5:
 Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power
 domain to fix the potential handshake issue.
 I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes
 I only drop R-b tag for Patch 3, since it has big change.
 An example, the pgc_mipi not take pgc_dispmix as parent:

	pgc_dispmix: power-domain@10 {
		#power-domain-cells = <0>;
		reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;
		clocks = <&clk IMX8MM_CLK_DISP_ROOT>,
			 <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
	};

	pgc_mipi: power-domain@11 {
		#power-domain-cells = <0>;
		reg = <IMX8MM_POWER_DOMAIN_MIPI>;
		power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;
	};

	dispmix_blk_ctl: clock-controller@32e28000 {
		compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
		reg = <0x32e28000 0x100>;
		#power-domain-cells = <1>;
		power-domains = <&pgc_dispmix>, <&pgc_mipi>;
		power-domain-names = "dispmix", "mipi";
		clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
	};

V4:
 Add R-b tag
 Typo fix
 Update the power domain macro names Per Abel and Frieder

V3:
 Add explaination for not listing items in patch 2 commit log Per Rob.
 Addressed comments from Lucas and Frieder on patch [3,4].
 A few comments from Jacky was ignored, because following gpcv2
 coding style.

V2:
 Fix yaml check failure.

Previously there is an effort from Abel that take BLK-CTL as clock
provider, but it turns out that there is A/B lock issue and we are
not able resolve that.

Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL
as a power domain provider and use GPC's domain as parent, the consumer
node take BLK-CTL as power domain input.

This patchset has been tested on i.MX8MM EVK board, but one hack
is not included in the patchset is that the DISPMIX BLK-CTL
MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a MIPI
DPHY driver, so fine to leave it.

Thanks for Lucas's suggestion, Frieder Schrempf for collecting
all the patches, Abel's previous BLK-CTL work, Jacky Bai on help
debug issues.


Peng Fan (4):
  dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains
  Documentation: bindings: clk: Add bindings for i.MX BLK_CTL
  soc: imx: Add generic blk-ctl driver
  soc: imx: Add blk-ctl driver for i.MX8MM

 .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++
 drivers/soc/imx/Makefile                      |   2 +-
 drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++
 drivers/soc/imx/blk-ctl.c                     | 311 ++++++++++++++++++
 drivers/soc/imx/blk-ctl.h                     |  85 +++++
 include/dt-bindings/power/imx8mm-power.h      |  13 +
 6 files changed, 615 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
 create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c
 create mode 100644 drivers/soc/imx/blk-ctl.c
 create mode 100644 drivers/soc/imx/blk-ctl.h

-- 
2.30.0

Comments

Adam Ford May 21, 2021, 3:37 p.m. UTC | #1
On Fri, May 21, 2021 at 5:27 AM Peng Fan (OSS) <peng.fan@oss.nxp.com> wrote:
>

> From: Peng Fan <peng.fan@nxp.com>

>

> V5:

>  Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power

>  domain to fix the potential handshake issue.

>  I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes

>  I only drop R-b tag for Patch 3, since it has big change.

>  An example, the pgc_mipi not take pgc_dispmix as parent:

>

>         pgc_dispmix: power-domain@10 {

>                 #power-domain-cells = <0>;

>                 reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;

>                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>,

>                          <&clk IMX8MM_CLK_DISP_AXI_ROOT>,

>                          <&clk IMX8MM_CLK_DISP_APB_ROOT>;

>         };

>

>         pgc_mipi: power-domain@11 {

>                 #power-domain-cells = <0>;

>                 reg = <IMX8MM_POWER_DOMAIN_MIPI>;

>                 power-domains = <&dispmix_blk_ctl IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;


With this change, I get a bunch of errors on boot.  The list of
power-domains appear correct on the surface, but it also has trouble
waking from sleep.

[    0.695947] imx8mm-blk-ctl imx-dispmix-blk-ctl.0: invalid resource
[    0.702849] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.0 failed
with error -22
[    0.711259] imx8mm-blk-ctl imx-dispmix-blk-ctl.1: invalid resource
[    0.716451] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.1 failed
with error -22
[    0.724856] imx8mm-blk-ctl imx-dispmix-blk-ctl.2: invalid resource
[    0.730097] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.2 failed
with error -22
[    0.738398] imx8mm-blk-ctl imx-dispmix-blk-ctl.3: invalid resource
[    0.743747] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.3 failed
with error -22

If I have a wrong device tree configuration, can you please post an
updated device tree?  I don't think an official patch for original
pgc's were pushed as part of either series. I used this e-mail as the
patch to enable the blk-ctl.

thanks,

adam

>         };

>

>         dispmix_blk_ctl: clock-controller@32e28000 {

>                 compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";

>                 reg = <0x32e28000 0x100>;

>                 #power-domain-cells = <1>;

>                 power-domains = <&pgc_dispmix>, <&pgc_mipi>;

>                 power-domain-names = "dispmix", "mipi";

>                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk IMX8MM_CLK_DISP_AXI_ROOT>,

>                          <&clk IMX8MM_CLK_DISP_APB_ROOT>;

>         };

>

> V4:

>  Add R-b tag

>  Typo fix

>  Update the power domain macro names Per Abel and Frieder

>

> V3:

>  Add explaination for not listing items in patch 2 commit log Per Rob.

>  Addressed comments from Lucas and Frieder on patch [3,4].

>  A few comments from Jacky was ignored, because following gpcv2

>  coding style.

>

> V2:

>  Fix yaml check failure.

>

> Previously there is an effort from Abel that take BLK-CTL as clock

> provider, but it turns out that there is A/B lock issue and we are

> not able resolve that.

>

> Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL

> as a power domain provider and use GPC's domain as parent, the consumer

> node take BLK-CTL as power domain input.

>

> This patchset has been tested on i.MX8MM EVK board, but one hack

> is not included in the patchset is that the DISPMIX BLK-CTL

> MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a MIPI

> DPHY driver, so fine to leave it.

>

> Thanks for Lucas's suggestion, Frieder Schrempf for collecting

> all the patches, Abel's previous BLK-CTL work, Jacky Bai on help

> debug issues.

>

>

> Peng Fan (4):

>   dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains

>   Documentation: bindings: clk: Add bindings for i.MX BLK_CTL

>   soc: imx: Add generic blk-ctl driver

>   soc: imx: Add blk-ctl driver for i.MX8MM

>

>  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++

>  drivers/soc/imx/Makefile                      |   2 +-

>  drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++

>  drivers/soc/imx/blk-ctl.c                     | 311 ++++++++++++++++++

>  drivers/soc/imx/blk-ctl.h                     |  85 +++++

>  include/dt-bindings/power/imx8mm-power.h      |  13 +

>  6 files changed, 615 insertions(+), 1 deletion(-)

>  create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

>  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c

>  create mode 100644 drivers/soc/imx/blk-ctl.c

>  create mode 100644 drivers/soc/imx/blk-ctl.h

>

> --

> 2.30.0

>
Peng Fan May 22, 2021, 12:54 a.m. UTC | #2
> Subject: Re: [PATCH V5 0/4] soc: imx: add i.MX BLK-CTL support

> 

> On Fri, May 21, 2021 at 5:27 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>

> wrote:

> >

> > From: Peng Fan <peng.fan@nxp.com>

> >

> > V5:

> >  Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power

> > domain to fix the potential handshake issue.

> >  I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes  I

> > only drop R-b tag for Patch 3, since it has big change.

> >  An example, the pgc_mipi not take pgc_dispmix as parent:

> >

> >         pgc_dispmix: power-domain@10 {

> >                 #power-domain-cells = <0>;

> >                 reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;

> >                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>,

> >                          <&clk IMX8MM_CLK_DISP_AXI_ROOT>,

> >                          <&clk IMX8MM_CLK_DISP_APB_ROOT>;

> >         };

> >

> >         pgc_mipi: power-domain@11 {

> >                 #power-domain-cells = <0>;

> >                 reg = <IMX8MM_POWER_DOMAIN_MIPI>;

> >                 power-domains = <&dispmix_blk_ctl

> > IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;

> 

> With this change, I get a bunch of errors on boot.  The list of power-domains

> appear correct on the surface, but it also has trouble waking from sleep.

> 

> [    0.695947] imx8mm-blk-ctl imx-dispmix-blk-ctl.0: invalid resource

> [    0.702849] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.0 failed

> with error -22

> [    0.711259] imx8mm-blk-ctl imx-dispmix-blk-ctl.1: invalid resource

> [    0.716451] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.1 failed

> with error -22

> [    0.724856] imx8mm-blk-ctl imx-dispmix-blk-ctl.2: invalid resource

> [    0.730097] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.2 failed

> with error -22

> [    0.738398] imx8mm-blk-ctl imx-dispmix-blk-ctl.3: invalid resource

> [    0.743747] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.3 failed

> with error -22


It is just the imx8mm-blk-ctl driver matches with the new created
child device, because the child device points the of_node of the parent
device.
But this error will not affect functionality.
I'll resolve this issue and send out v6.
> 

> If I have a wrong device tree configuration, can you please post an updated

> device tree?  I don't think an official patch for original pgc's were pushed as

> part of either series. I used this e-mail as the patch to enable the blk-ctl.


Do you have an device tree, I could give a look.

Regards,
Peng.

> 

> thanks,

> 

> adam

> 

> >         };

> >

> >         dispmix_blk_ctl: clock-controller@32e28000 {

> >                 compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";

> >                 reg = <0x32e28000 0x100>;

> >                 #power-domain-cells = <1>;

> >                 power-domains = <&pgc_dispmix>, <&pgc_mipi>;

> >                 power-domain-names = "dispmix", "mipi";

> >                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk

> IMX8MM_CLK_DISP_AXI_ROOT>,

> >                          <&clk IMX8MM_CLK_DISP_APB_ROOT>;

> >         };

> >

> > V4:

> >  Add R-b tag

> >  Typo fix

> >  Update the power domain macro names Per Abel and Frieder

> >

> > V3:

> >  Add explaination for not listing items in patch 2 commit log Per Rob.

> >  Addressed comments from Lucas and Frieder on patch [3,4].

> >  A few comments from Jacky was ignored, because following gpcv2

> > coding style.

> >

> > V2:

> >  Fix yaml check failure.

> >

> > Previously there is an effort from Abel that take BLK-CTL as clock

> > provider, but it turns out that there is A/B lock issue and we are not

> > able resolve that.

> >

> > Per discuss with Lucas and Jacky, we made an agreement that take

> > BLK-CTL as a power domain provider and use GPC's domain as parent, the

> > consumer node take BLK-CTL as power domain input.

> >

> > This patchset has been tested on i.MX8MM EVK board, but one hack is

> > not included in the patchset is that the DISPMIX BLK-CTL

> > MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a MIPI

> > DPHY driver, so fine to leave it.

> >

> > Thanks for Lucas's suggestion, Frieder Schrempf for collecting all the

> > patches, Abel's previous BLK-CTL work, Jacky Bai on help debug issues.

> >

> >

> > Peng Fan (4):

> >   dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains

> >   Documentation: bindings: clk: Add bindings for i.MX BLK_CTL

> >   soc: imx: Add generic blk-ctl driver

> >   soc: imx: Add blk-ctl driver for i.MX8MM

> >

> >  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++

> >  drivers/soc/imx/Makefile                      |   2 +-

> >  drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++

> >  drivers/soc/imx/blk-ctl.c                     | 311

> ++++++++++++++++++

> >  drivers/soc/imx/blk-ctl.h                     |  85 +++++

> >  include/dt-bindings/power/imx8mm-power.h      |  13 +

> >  6 files changed, 615 insertions(+), 1 deletion(-)  create mode 100644

> > Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

> >  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c  create mode

> > 100644 drivers/soc/imx/blk-ctl.c  create mode 100644

> > drivers/soc/imx/blk-ctl.h

> >

> > --

> > 2.30.0

> >
Adam Ford May 22, 2021, 2:32 a.m. UTC | #3
On Fri, May 21, 2021 at 7:54 PM Peng Fan <peng.fan@nxp.com> wrote:
>

> > Subject: Re: [PATCH V5 0/4] soc: imx: add i.MX BLK-CTL support

> >

> > On Fri, May 21, 2021 at 5:27 AM Peng Fan (OSS) <peng.fan@oss.nxp.com>

> > wrote:

> > >

> > > From: Peng Fan <peng.fan@nxp.com>

> > >

> > > V5:

> > >  Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power

> > > domain to fix the potential handshake issue.

> > >  I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes  I

> > > only drop R-b tag for Patch 3, since it has big change.

> > >  An example, the pgc_mipi not take pgc_dispmix as parent:

> > >

> > >         pgc_dispmix: power-domain@10 {

> > >                 #power-domain-cells = <0>;

> > >                 reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;

> > >                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>,

> > >                          <&clk IMX8MM_CLK_DISP_AXI_ROOT>,

> > >                          <&clk IMX8MM_CLK_DISP_APB_ROOT>;

> > >         };

> > >

> > >         pgc_mipi: power-domain@11 {

> > >                 #power-domain-cells = <0>;

> > >                 reg = <IMX8MM_POWER_DOMAIN_MIPI>;

> > >                 power-domains = <&dispmix_blk_ctl

> > > IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;

> >

> > With this change, I get a bunch of errors on boot.  The list of power-domains

> > appear correct on the surface, but it also has trouble waking from sleep.

> >

> > [    0.695947] imx8mm-blk-ctl imx-dispmix-blk-ctl.0: invalid resource

> > [    0.702849] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.0 failed

> > with error -22

> > [    0.711259] imx8mm-blk-ctl imx-dispmix-blk-ctl.1: invalid resource

> > [    0.716451] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.1 failed

> > with error -22

> > [    0.724856] imx8mm-blk-ctl imx-dispmix-blk-ctl.2: invalid resource

> > [    0.730097] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.2 failed

> > with error -22

> > [    0.738398] imx8mm-blk-ctl imx-dispmix-blk-ctl.3: invalid resource

> > [    0.743747] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.3 failed

> > with error -22

>

> It is just the imx8mm-blk-ctl driver matches with the new created

> child device, because the child device points the of_node of the parent

> device.

> But this error will not affect functionality.

> I'll resolve this issue and send out v6.

> >

> > If I have a wrong device tree configuration, can you please post an updated

> > device tree?  I don't think an official patch for original pgc's were pushed as

> > part of either series. I used this e-mail as the patch to enable the blk-ctl.

>

> Do you have an device tree, I could give a look.


I have a git repo where I've been collecting the various power domain
patches.  I have updated the imx8mn blk-ctl and device trees as well
in that same repo.

https://github.com/aford173/linux/blob/linux-5.13.y-aford/arch/arm64/boot/dts/freescale/imx8mm.dtsi

thanks for looking at this.

adam
>

> Regards,

> Peng.

>

> >

> > thanks,

> >

> > adam

> >

> > >         };

> > >

> > >         dispmix_blk_ctl: clock-controller@32e28000 {

> > >                 compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";

> > >                 reg = <0x32e28000 0x100>;

> > >                 #power-domain-cells = <1>;

> > >                 power-domains = <&pgc_dispmix>, <&pgc_mipi>;

> > >                 power-domain-names = "dispmix", "mipi";

> > >                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk

> > IMX8MM_CLK_DISP_AXI_ROOT>,

> > >                          <&clk IMX8MM_CLK_DISP_APB_ROOT>;

> > >         };

> > >

> > > V4:

> > >  Add R-b tag

> > >  Typo fix

> > >  Update the power domain macro names Per Abel and Frieder

> > >

> > > V3:

> > >  Add explaination for not listing items in patch 2 commit log Per Rob.

> > >  Addressed comments from Lucas and Frieder on patch [3,4].

> > >  A few comments from Jacky was ignored, because following gpcv2

> > > coding style.

> > >

> > > V2:

> > >  Fix yaml check failure.

> > >

> > > Previously there is an effort from Abel that take BLK-CTL as clock

> > > provider, but it turns out that there is A/B lock issue and we are not

> > > able resolve that.

> > >

> > > Per discuss with Lucas and Jacky, we made an agreement that take

> > > BLK-CTL as a power domain provider and use GPC's domain as parent, the

> > > consumer node take BLK-CTL as power domain input.

> > >

> > > This patchset has been tested on i.MX8MM EVK board, but one hack is

> > > not included in the patchset is that the DISPMIX BLK-CTL

> > > MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a MIPI

> > > DPHY driver, so fine to leave it.

> > >

> > > Thanks for Lucas's suggestion, Frieder Schrempf for collecting all the

> > > patches, Abel's previous BLK-CTL work, Jacky Bai on help debug issues.

> > >

> > >

> > > Peng Fan (4):

> > >   dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains

> > >   Documentation: bindings: clk: Add bindings for i.MX BLK_CTL

> > >   soc: imx: Add generic blk-ctl driver

> > >   soc: imx: Add blk-ctl driver for i.MX8MM

> > >

> > >  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++

> > >  drivers/soc/imx/Makefile                      |   2 +-

> > >  drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++

> > >  drivers/soc/imx/blk-ctl.c                     | 311

> > ++++++++++++++++++

> > >  drivers/soc/imx/blk-ctl.h                     |  85 +++++

> > >  include/dt-bindings/power/imx8mm-power.h      |  13 +

> > >  6 files changed, 615 insertions(+), 1 deletion(-)  create mode 100644

> > > Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

> > >  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c  create mode

> > > 100644 drivers/soc/imx/blk-ctl.c  create mode 100644

> > > drivers/soc/imx/blk-ctl.h

> > >

> > > --

> > > 2.30.0

> > >
Peng Fan (OSS) May 22, 2021, 12:30 p.m. UTC | #4
> Subject: Re: [PATCH V5 0/4] soc: imx: add i.MX BLK-CTL support

> 

> On Fri, May 21, 2021 at 7:54 PM Peng Fan <peng.fan@nxp.com> wrote:

> >

> > > Subject: Re: [PATCH V5 0/4] soc: imx: add i.MX BLK-CTL support

> > >

> > > On Fri, May 21, 2021 at 5:27 AM Peng Fan (OSS)

> > > <peng.fan@oss.nxp.com>

> > > wrote:

> > > >

> > > > From: Peng Fan <peng.fan@nxp.com>

> > > >

> > > > V5:

> > > >  Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent

> > > > power domain to fix the potential handshake issue.

> > > >  I still keep R-b/A-b tag for Patch 1,2,4, since very minor

> > > > changes  I only drop R-b tag for Patch 3, since it has big change.

> > > >  An example, the pgc_mipi not take pgc_dispmix as parent:

> > > >

> > > >         pgc_dispmix: power-domain@10 {

> > > >                 #power-domain-cells = <0>;

> > > >                 reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;

> > > >                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>,

> > > >                          <&clk IMX8MM_CLK_DISP_AXI_ROOT>,

> > > >                          <&clk

> IMX8MM_CLK_DISP_APB_ROOT>;

> > > >         };

> > > >

> > > >         pgc_mipi: power-domain@11 {

> > > >                 #power-domain-cells = <0>;

> > > >                 reg = <IMX8MM_POWER_DOMAIN_MIPI>;

> > > >                 power-domains = <&dispmix_blk_ctl

> > > > IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;

> > >

> > > With this change, I get a bunch of errors on boot.  The list of

> > > power-domains appear correct on the surface, but it also has trouble

> waking from sleep.

> > >

> > > [    0.695947] imx8mm-blk-ctl imx-dispmix-blk-ctl.0: invalid resource

> > > [    0.702849] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.0 failed

> > > with error -22

> > > [    0.711259] imx8mm-blk-ctl imx-dispmix-blk-ctl.1: invalid resource

> > > [    0.716451] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.1 failed

> > > with error -22

> > > [    0.724856] imx8mm-blk-ctl imx-dispmix-blk-ctl.2: invalid resource

> > > [    0.730097] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.2 failed

> > > with error -22

> > > [    0.738398] imx8mm-blk-ctl imx-dispmix-blk-ctl.3: invalid resource

> > > [    0.743747] imx8mm-blk-ctl: probe of imx-dispmix-blk-ctl.3 failed

> > > with error -22

> >

> > It is just the imx8mm-blk-ctl driver matches with the new created

> > child device, because the child device points the of_node of the

> > parent device.

> > But this error will not affect functionality.

> > I'll resolve this issue and send out v6.

> > >

> > > If I have a wrong device tree configuration, can you please post an

> > > updated device tree?  I don't think an official patch for original

> > > pgc's were pushed as part of either series. I used this e-mail as the patch

> to enable the blk-ctl.

> >

> > Do you have an device tree, I could give a look.

> 

> I have a git repo where I've been collecting the various power domain patches.

> I have updated the imx8mn blk-ctl and device trees as well in that same repo.


I put my dts diff here:
https://gist.github.com/MrVan/d73888d8273c43ea4a3b28fa668ca1d0
Not include vpu, lcdif, mipi, just gpc and blk-ctl.

Your dts has error, the vpu-g1/g2/h1 should use vpu-blk as parent power domain.
And the vpu-blk-ctl power domain changes as below:
power-domain-names = "vpumix", "vpu-g1", "vpu-g2", "vpu-h1";

Regards,
Peng.

> 

> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.

> com%2Faford173%2Flinux%2Fblob%2Flinux-5.13.y-aford%2Farch%2Farm64%

> 2Fboot%2Fdts%2Ffreescale%2Fimx8mm.dtsi&amp;data=04%7C01%7Cpeng.f

> an%40nxp.com%7Ca5c04b8b13514290944008d91cc9d95f%7C686ea1d3bc2

> b4c6fa92cd99c5c301635%7C0%7C0%7C637572475532314749%7CUnknown

> %7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha

> WwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=NjxeojlrUc5t1tmrpZrhmYL1jaGB

> QNHv8QVh2OcgMpA%3D&amp;reserved=0

> 

> thanks for looking at this.

> 

> adam

> >

> > Regards,

> > Peng.

> >

> > >

> > > thanks,

> > >

> > > adam

> > >

> > > >         };

> > > >

> > > >         dispmix_blk_ctl: clock-controller@32e28000 {

> > > >                 compatible = "fsl,imx8mm-dispmix-blk-ctl",

> "syscon";

> > > >                 reg = <0x32e28000 0x100>;

> > > >                 #power-domain-cells = <1>;

> > > >                 power-domains = <&pgc_dispmix>, <&pgc_mipi>;

> > > >                 power-domain-names = "dispmix", "mipi";

> > > >                 clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk

> > > IMX8MM_CLK_DISP_AXI_ROOT>,

> > > >                          <&clk

> IMX8MM_CLK_DISP_APB_ROOT>;

> > > >         };

> > > >

> > > > V4:

> > > >  Add R-b tag

> > > >  Typo fix

> > > >  Update the power domain macro names Per Abel and Frieder

> > > >

> > > > V3:

> > > >  Add explaination for not listing items in patch 2 commit log Per Rob.

> > > >  Addressed comments from Lucas and Frieder on patch [3,4].

> > > >  A few comments from Jacky was ignored, because following gpcv2

> > > > coding style.

> > > >

> > > > V2:

> > > >  Fix yaml check failure.

> > > >

> > > > Previously there is an effort from Abel that take BLK-CTL as clock

> > > > provider, but it turns out that there is A/B lock issue and we are

> > > > not able resolve that.

> > > >

> > > > Per discuss with Lucas and Jacky, we made an agreement that take

> > > > BLK-CTL as a power domain provider and use GPC's domain as parent,

> > > > the consumer node take BLK-CTL as power domain input.

> > > >

> > > > This patchset has been tested on i.MX8MM EVK board, but one hack

> > > > is not included in the patchset is that the DISPMIX BLK-CTL

> > > > MIPI_M/S_RESET not implemented. Per Lucas, we will finally have a

> > > > MIPI DPHY driver, so fine to leave it.

> > > >

> > > > Thanks for Lucas's suggestion, Frieder Schrempf for collecting all

> > > > the patches, Abel's previous BLK-CTL work, Jacky Bai on help debug

> issues.

> > > >

> > > >

> > > > Peng Fan (4):

> > > >   dt-bindings: power: Add defines for i.MX8MM BLK-CTL power

> domains

> > > >   Documentation: bindings: clk: Add bindings for i.MX BLK_CTL

> > > >   soc: imx: Add generic blk-ctl driver

> > > >   soc: imx: Add blk-ctl driver for i.MX8MM

> > > >

> > > >  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++

> > > >  drivers/soc/imx/Makefile                      |   2 +-

> > > >  drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++

> > > >  drivers/soc/imx/blk-ctl.c                     | 311

> > > ++++++++++++++++++

> > > >  drivers/soc/imx/blk-ctl.h                     |  85 +++++

> > > >  include/dt-bindings/power/imx8mm-power.h      |  13 +

> > > >  6 files changed, 615 insertions(+), 1 deletion(-)  create mode

> > > > 100644

> > > > Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml

> > > >  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c  create

> mode

> > > > 100644 drivers/soc/imx/blk-ctl.c  create mode 100644

> > > > drivers/soc/imx/blk-ctl.h

> > > >

> > > > --

> > > > 2.30.0

> > > >