[00/14] Multiple addition and improvement to ipq8064 gcc

This is an attempt in making the ipq8064 SoC actually usable. Currently
many feature are missing for this SoC and devs user off-the-tree patches
to make it work (example patch for missing clock, patch for cpufreq
driver, patch to add missing node in the dts)

I notice there was some work in modernizing the gcc driver for other
qcom target but this wasn't done for ipq806x. This does exactly this, we
drop any parent_names stuff and we switch to the parent_data way. We
also drop the pxo and cxo source clk from gcc driver and we refer to the
dts for it.

This also add all the missing feature for the nss cores and the
cryptoengine in them. It does also introduce the required flags to make
the RPM actually work and NOT reject any command. There was an attempt
in declaring these clock as core clock in the dts but this ends up in no
serial as the kernel makes these clock not accessible. We just want to
make the kernel NOT disable them if unused nothing more.

At the end we update the ipq8064 dtsi to add the pxo and cxo tag and
declare them in gcc and also fix a problem with tsens probe.

Ansuel Smith (14):
  dt-bindings: clock: Document qcom,gcc-ipq8064 binding
  drivers: clk: qcom: gcc-ipq806x: fix wrong naming for
    gcc_pxo_pll8_pll0
  drivers: clk: qcom: gcc-ipq806x: convert parent_names to parent_data
  drivers: clk: qcom: gcc-ipq806x: use ARRAY_SIZE for num_parents
  drivers: clk: qcom: gcc-ipq806x: drop hardcoded pxo and cxo source clk
  drivers: clk: qcom: gcc-ipq806x: use parent_hws where possible
  drivers: clk: qcom: gcc-ipq806x: add additional freq nss cores
  drivers: clk: qcom: gcc-ipq806x: add unusued flag for critical clock
  drivers: clk: qcom: gcc-ipq806x: add additional freq for sdc table
  dt-bindings: clock: add ipq8064 ce5 clk define
  drivers: clk: qcom: gcc-ipq806x: add CryptoEngine clocks
  dt-bindings: reset: add ipq8064 ce5 resets
  drivers: clk: qcom: gcc-ipq806x: add CryptoEngine resets
  ARM: dts: qcom: Add syscon and cxo/pxo clock to gcc node for ipq8064

 .../bindings/clock/qcom,gcc-ipq8064.yaml      |  67 ++
 arch/arm/boot/dts/qcom-ipq8064.dtsi           |   8 +-
 drivers/clk/qcom/gcc-ipq806x.c                | 652 +++++++++++++-----
 include/dt-bindings/clock/qcom,gcc-ipq806x.h  |   5 +-
 include/dt-bindings/reset/qcom,gcc-ipq806x.h  |   5 +
 5 files changed, 567 insertions(+), 170 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml

On Tue, Jan 18, 2022 at 01:44:21AM +0100, Ansuel Smith wrote:
> Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source
> clocks. The gcc node is also used by the tsens driver, already Documented,
> to get the calib nvmem cells and the base reg from gcc.
> 
> Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> ---
>  .../bindings/clock/qcom,gcc-ipq8064.yaml      | 67 +++++++++++++++++++
>  1 file changed, 67 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
> 
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
> new file mode 100644
> index 000000000000..2dc254fdf161
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
> +
> +maintainers:
> +  - Ansuel Smith <ansuelsmth@gmail.com>
> +
> +description: |
> +  Qualcomm global clock control module which supports the clocks, resets and
> +  power domains on IPQ8064.
> +
> +properties:
> +  compatible:
> +    const: qcom,gcc-ipq8064
> +
> +  '#clock-cells':
> +    const: 1
> +
> +  '#reset-cells':
> +    const: 1
> +
> +  '#power-domain-cells':
> +    const: 1
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: PXO source
> +      - description: CX0 source
> +
> +  clock-names:
> +    items:
> +      - const: pxo
> +      - const: cxo
> +
> +required:
> +  - compatible
> +  - reg
> +  - '#clock-cells'
> +  - '#reset-cells'
> +  - '#power-domain-cells'
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: true

Must be 'false'. True is only for incomplete schemas included by other 
schemas.

> +
> +examples:
> +  - |
> +    gcc: clock-controller@900000 {
> +      compatible = "qcom,gcc-ipq8064", "syscon";
> +      reg = <0x00900000 0x4000>;
> +      clocks = <&pxo_board>, <&cxo_board>;
> +      clock-names = "pxo", "cxo";
> +      #clock-cells = <1>;
> +      #reset-cells = <1>;
> +      #power-domain-cells = <1>;
> +
> +      /* Tsens node definition */

You need to define child nodes.

> +
> +    };
> +...
> -- 
> 2.33.1
> 
>

On Wed, Jan 19, 2022 at 07:59:03AM -0600, Rob Herring wrote:
> On Tue, Jan 18, 2022 at 01:44:21AM +0100, Ansuel Smith wrote:
> > Document qcom,gcc-ipq8064 binding needed to declare pxo and cxo source
> > clocks. The gcc node is also used by the tsens driver, already Documented,
> > to get the calib nvmem cells and the base reg from gcc.
> > 
> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
> > ---
> >  .../bindings/clock/qcom,gcc-ipq8064.yaml      | 67 +++++++++++++++++++
> >  1 file changed, 67 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
> > new file mode 100644
> > index 000000000000..2dc254fdf161
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
> > @@ -0,0 +1,67 @@
> > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
> > +
> > +maintainers:
> > +  - Ansuel Smith <ansuelsmth@gmail.com>
> > +
> > +description: |
> > +  Qualcomm global clock control module which supports the clocks, resets and
> > +  power domains on IPQ8064.
> > +
> > +properties:
> > +  compatible:
> > +    const: qcom,gcc-ipq8064
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +
> > +  '#reset-cells':
> > +    const: 1
> > +
> > +  '#power-domain-cells':
> > +    const: 1
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    items:
> > +      - description: PXO source
> > +      - description: CX0 source
> > +
> > +  clock-names:
> > +    items:
> > +      - const: pxo
> > +      - const: cxo
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#clock-cells'
> > +  - '#reset-cells'
> > +  - '#power-domain-cells'
> > +  - clocks
> > +  - clock-names
> > +
> > +additionalProperties: true
> 
> Must be 'false'. True is only for incomplete schemas included by other 
> schemas.
> 
> > +
> > +examples:
> > +  - |
> > +    gcc: clock-controller@900000 {
> > +      compatible = "qcom,gcc-ipq8064", "syscon";
> > +      reg = <0x00900000 0x4000>;
> > +      clocks = <&pxo_board>, <&cxo_board>;
> > +      clock-names = "pxo", "cxo";
> > +      #clock-cells = <1>;
> > +      #reset-cells = <1>;
> > +      #power-domain-cells = <1>;
> > +
> > +      /* Tsens node definition */
> 
> You need to define child nodes.
>

Is it correct to put in the example the tsens node Documented in another
file? Or should I just remove the comment?

> > +
> > +    };
> > +...
> > -- 
> > 2.33.1
> > 
> >