From patchwork Fri Feb 25 13:31:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel FERNANDEZ X-Patchwork-Id: 546273 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 50B8FC433FE for ; Fri, 25 Feb 2022 13:32:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241387AbiBYNdG (ORCPT ); Fri, 25 Feb 2022 08:33:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241370AbiBYNdF (ORCPT ); Fri, 25 Feb 2022 08:33:05 -0500 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 879B71C2F68; Fri, 25 Feb 2022 05:32:33 -0800 (PST) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 21PD9HH7031562; Fri, 25 Feb 2022 14:32:09 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=selector1; bh=snC15qVtSfEctH62wvfOLmhzFjohjErLAZqhaquNmjM=; b=e9hvAVSWsuN6FyjL2cxPf4MzvFoI/7rG2az1JRFEpe4Dd+ZKSqiBLSg9vpL19C1N4wvB xfEX0pUVhVIwAPLVtm/ERRYW/4QM7YTf1Kqx8ICvWN5VfCDyle3kjUmYU5cwzt3RrwEF pEfuFoKw80PpLq1ZEQL7hCdNYocqH+eFzbFr6yB2GvNR9UJUSe5buryyVxZybvTWxuPc zvvc9mw6FwRIoMrCO5s58LzROwSnm3H6LqOz8tmPhkr5E4GrUjbYI+UMsrd3BNTND+lg mkZ9ipMMMBQcVoq52kMkXNpy8r7LtJHM0e96WgPpXZkwttvCHVyJve93TARwuOIYcz9V hg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3eetrf27na-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Feb 2022 14:32:09 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 840C210002A; Fri, 25 Feb 2022 14:32:08 +0100 (CET) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 7AE5B22788D; Fri, 25 Feb 2022 14:32:08 +0100 (CET) Received: from localhost (10.75.127.44) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.26; Fri, 25 Feb 2022 14:32:08 +0100 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Gabriel Fernandez CC: , , , , Subject: [PATCH v2 00/13] Introduction of STM32MP13 RCC driver (Reset Clock Controller) Date: Fri, 25 Feb 2022 14:31:24 +0100 Message-ID: <20220225133137.813919-1-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.44] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-02-25_08,2022-02-25_01,2022-02-23_01 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gabriel Fernandez This patchset introduce the reset and clock driver of STM32MP13 SoC. It uses a clk-stm32-core module to manage stm32 gate, mux and divider for STM32MP13 and for new future STMP32 SoC. v2: - Resend because patch 9,10,12,13 has not been sent - add Reviewed by Krzysztof Kozlowski for patch 1 Gabriel Fernandez (13): dt-bindings: rcc: stm32: add new compatible for STM32MP13 SoC clk: stm32: Introduce STM32MP13 RCC drivers (Reset Clock Controller) clk: stm32mp13: add stm32_mux clock management clk: stm32mp13: add stm32_gate management clk: stm32mp13: add stm32 divider clock clk: stm32mp13: add composite clock clk: stm32mp13: manage secured clocks clk: stm32mp13: add all STM32MP13 peripheral clocks clk: stm32mp13: add all STM32MP13 kernel clocks clk: stm32mp13: add multi mux function clk: stm32mp13: add safe mux management ARM: dts: stm32: enable optee firmware and SCMI support on STM32MP13 ARM: dts: stm32: add RCC on STM32MP13x SoC family .../bindings/clock/st,stm32mp1-rcc.yaml | 2 + arch/arm/boot/dts/stm32mp131.dtsi | 128 +- arch/arm/boot/dts/stm32mp133.dtsi | 4 +- arch/arm/boot/dts/stm32mp13xf.dtsi | 3 +- drivers/clk/Kconfig | 5 + drivers/clk/Makefile | 1 + drivers/clk/stm32/Makefile | 1 + drivers/clk/stm32/clk-stm32-core.c | 707 +++++++ drivers/clk/stm32/clk-stm32-core.h | 239 +++ drivers/clk/stm32/clk-stm32mp13.c | 1580 +++++++++++++++ drivers/clk/stm32/reset-stm32.c | 122 ++ drivers/clk/stm32/reset-stm32.h | 8 + drivers/clk/stm32/stm32mp13_rcc.h | 1748 +++++++++++++++++ include/dt-bindings/clock/stm32mp13-clks.h | 229 +++ include/dt-bindings/reset/stm32mp13-resets.h | 100 + 15 files changed, 4817 insertions(+), 60 deletions(-) create mode 100644 drivers/clk/stm32/Makefile create mode 100644 drivers/clk/stm32/clk-stm32-core.c create mode 100644 drivers/clk/stm32/clk-stm32-core.h create mode 100644 drivers/clk/stm32/clk-stm32mp13.c create mode 100644 drivers/clk/stm32/reset-stm32.c create mode 100644 drivers/clk/stm32/reset-stm32.h create mode 100644 drivers/clk/stm32/stm32mp13_rcc.h create mode 100644 include/dt-bindings/clock/stm32mp13-clks.h create mode 100644 include/dt-bindings/reset/stm32mp13-resets.h