| Message ID | 20230313165620.128463-1-ahalaney@redhat.com |
|---|---|
| Headers | show |
| Series | Add EMAC3 support for sa8540p-ride | expand |
Bjorn, On Mon, Mar 13, 2023 at 03:57:27PM -0700, Stephen Boyd wrote: > Quoting Andrew Halaney (2023-03-13 09:56:14) > > Add the EMAC GDSCs to allow the EMAC hardware to be enabled. > > > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > > --- > > Acked-by: Stephen Boyd <sboyd@kernel.org> > > I'm not sure if Bjorn Andersson is planning on modifying this file too, > so please confirm it can go through netdev tree. > Can you please help respond to Stephen's comment above? I admittedly don't have much experience sending patch series that span across multiple subsystems, so if there's something I should be doing differently (to indicate who takes what patches, etc) in submission please do not hesitate to be overly verbose in instructing me! Thanks, Andrew
On 13.03.2023 17:56, Andrew Halaney wrote: > Add the EMAC GDSCs to allow the EMAC hardware to be enabled. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- Was it tested to not cause issues on access on "normal" 8280xp? AFAICS if there would be any, they would happen at registration time, as gdsc_init already accesses its registers Konrad > drivers/clk/qcom/gcc-sc8280xp.c | 18 ++++++++++++++++++ > include/dt-bindings/clock/qcom,gcc-sc8280xp.h | 2 ++ > 2 files changed, 20 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c > index b3198784e1c3..04a99dbaa57e 100644 > --- a/drivers/clk/qcom/gcc-sc8280xp.c > +++ b/drivers/clk/qcom/gcc-sc8280xp.c > @@ -6873,6 +6873,22 @@ static struct gdsc usb30_sec_gdsc = { > .pwrsts = PWRSTS_RET_ON, > }; > > +static struct gdsc emac_0_gdsc = { > + .gdscr = 0xaa004, > + .pd = { > + .name = "emac_0_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > +}; > + > +static struct gdsc emac_1_gdsc = { > + .gdscr = 0xba004, > + .pd = { > + .name = "emac_1_gdsc", > + }, > + .pwrsts = PWRSTS_OFF_ON, > +}; > + > static struct clk_regmap *gcc_sc8280xp_clocks[] = { > [GCC_AGGRE_NOC_PCIE0_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie0_tunnel_axi_clk.clkr, > [GCC_AGGRE_NOC_PCIE1_TUNNEL_AXI_CLK] = &gcc_aggre_noc_pcie1_tunnel_axi_clk.clkr, > @@ -7351,6 +7367,8 @@ static struct gdsc *gcc_sc8280xp_gdscs[] = { > [USB30_MP_GDSC] = &usb30_mp_gdsc, > [USB30_PRIM_GDSC] = &usb30_prim_gdsc, > [USB30_SEC_GDSC] = &usb30_sec_gdsc, > + [EMAC_0_GDSC] = &emac_0_gdsc, > + [EMAC_1_GDSC] = &emac_1_gdsc, > }; > > static const struct clk_rcg_dfs_data gcc_dfs_clocks[] = { > diff --git a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h > index cb2fb638825c..721105ea4fad 100644 > --- a/include/dt-bindings/clock/qcom,gcc-sc8280xp.h > +++ b/include/dt-bindings/clock/qcom,gcc-sc8280xp.h > @@ -492,5 +492,7 @@ > #define USB30_MP_GDSC 9 > #define USB30_PRIM_GDSC 10 > #define USB30_SEC_GDSC 11 > +#define EMAC_0_GDSC 12 > +#define EMAC_1_GDSC 13 > > #endif
On 13/03/2023 17:56, Andrew Halaney wrote: > The sc8280xp has a new version of the ETHQOS hardware in it, EMAC v3. > Add a compatible for this. > > Signed-off-by: Andrew Halaney <ahalaney@redhat.com> > --- > Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 1 + > Documentation/devicetree/bindings/net/snps,dwmac.yaml | 3 +++ > 2 files changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml > index 68ef43fb283d..89c17ed0442f 100644 > --- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml > +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml > @@ -24,6 +24,7 @@ properties: > enum: > - qcom,qcs404-ethqos > - qcom,sm8150-ethqos > + - qcom,sc8280xp-ethqos Alphabetical order, same in other places. Best regards, Krzysztof