From patchwork Tue Jun 27 06:39:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shawn Sung X-Patchwork-Id: 697503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 672A5EB64DC for ; Tue, 27 Jun 2023 06:40:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230468AbjF0GkL (ORCPT ); Tue, 27 Jun 2023 02:40:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230405AbjF0GkE (ORCPT ); Tue, 27 Jun 2023 02:40:04 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9F2610F5; Mon, 26 Jun 2023 23:40:01 -0700 (PDT) X-UUID: 6d47ba4014b511ee9cb5633481061a41-20230627 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=2XXVEk7qA2iHfqWdaM8/8LGdZaxFNHpbgzLNpR/WPQ0=; b=FWSsfj1xCEnvYl/zjXzT+XUHt7nAgo4YDvHzdA9gi9R3xwQCxXijR7v7r/6kIPHp/dopMSBfR7PKlH8vlcwyLOrsuJdVWxgcO0ZbmbksbaYHZCjeEXKA+iVrhcnIfL+El+M4V3XPAWeWG5edhdGPSMzqAAjdhw9tazVCH4gbqZQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.27, REQID:77d96bcd-b316-4147-8e11-f51fc04f2a02, IP:0, U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:95 X-CID-INFO: VERSION:1.1.27, REQID:77d96bcd-b316-4147-8e11-f51fc04f2a02, IP:0, URL :0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTION :quarantine,TS:95 X-CID-META: VersionHash:01c9525, CLOUDID:7952833c-1de7-4159-8529-a1dab19d9307, B ulkID:230627143956DFE8WQJ8,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SDM, TF_CID_SPAM_ASC, TF_CID_SPAM_FAS, TF_CID_SPAM_FSD, TF_CID_SPAM_SNR X-UUID: 6d47ba4014b511ee9cb5633481061a41-20230627 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 803903847; Tue, 27 Jun 2023 14:39:55 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Tue, 27 Jun 2023 14:39:53 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Tue, 27 Jun 2023 14:39:53 +0800 From: Hsiao Chien Sung To: AngeloGioacchino Del Regno , Chun-Kuang Hu , Krzysztof Kozlowski , Matthias Brugger , Philipp Zabel , Rob Herring CC: , , , , , Singo Chang , Nancy Lin , Jason-JH Lin , Shawn Sung Subject: [PATCH v5 00/14] Add display driver for MT8188 VDOSYS1 Date: Tue, 27 Jun 2023 14:39:32 +0800 Message-ID: <20230627063946.14935-1-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Support MT8188 VDOSYS1 in display driver. Changes in v5: - Reuse .clk_enable/.clk_disable in struct mtk_ddp_comp_funcs in mtk_disp_ovl_adaptor.c - Adjust commits order Changes in v4: - Add new functions in mtk_disp_ovl_adaptor.c to enable/disable components and reuse them when clock enable/disable - Rename components in mtk_disp_ovl_adaptor.c and sort them in alphabetical order Changes in v3: - Define macro MMSYS_RST_NR in mtk-mmsys.h and update reset table - Fix typos (ETDHR -> ETHDR, VSNYC -> VSYNC) - Rebase dt-bindings on linux-next - Refine description of Padding - Squash reset bit map commits for VDO0 and VDO1 into one Changes in v2: - Remove redundant compatibles of MT8188 because it shares the same configuration with MT8195 - Separate dt-bindings by modules - Support reset bit mapping in mmsys driver Hsiao Chien Sung (14): dt-bindings: display: mediatek: ethdr: Add compatible for MT8188 dt-bindings: display: mediatek: mdp-rdma: Add compatible for MT8188 dt-bindings: display: mediatek: merge: Add compatible for MT8188 dt-bindings: display: mediatek: padding: Add MT8188 dt-bindings: arm: mediatek: Add compatible for MT8188 dt-bindings: reset: mt8188: Add VDOSYS reset control bits soc: mediatek: Support MT8188 VDOSYS1 in mtk-mmsys soc: mediatek: Support MT8188 VDOSYS1 Padding in mtk-mmsys soc: mediatek: Support reset bit mapping in mmsys driver soc: mediatek: Add MT8188 VDOSYS reset bit map drm/mediatek: Support MT8188 VDOSYS1 in display driver drm/mediatek: Sort OVL adaptor components in alphabetical order drm/mediatek: Improve compatibility of display driver drm/mediatek: Support MT8188 Padding in display driver .../bindings/arm/mediatek/mediatek,mmsys.yaml | 1 + .../display/mediatek/mediatek,ethdr.yaml | 6 +- .../display/mediatek/mediatek,mdp-rdma.yaml | 6 +- .../display/mediatek/mediatek,merge.yaml | 3 + .../display/mediatek/mediatek,padding.yaml | 81 +++++++ drivers/gpu/drm/mediatek/Makefile | 3 +- drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 + .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 226 +++++++++--------- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 4 + drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 +- drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 20 +- drivers/gpu/drm/mediatek/mtk_padding.c | 136 +++++++++++ drivers/soc/mediatek/mt8188-mmsys.h | 210 ++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 23 ++ drivers/soc/mediatek/mtk-mmsys.h | 32 +++ drivers/soc/mediatek/mtk-mutex.c | 51 ++++ include/dt-bindings/reset/mt8188-resets.h | 75 ++++++ include/linux/soc/mediatek/mtk-mmsys.h | 8 + 18 files changed, 768 insertions(+), 122 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml create mode 100644 drivers/gpu/drm/mediatek/mtk_padding.c --- 2.18.0