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[v3,0/3] USB: dwc: Add workaround for host mode VBUS glitch when boot

Message ID 20240123164241.3689109-1-Frank.Li@nxp.com
Headers show
Series USB: dwc: Add workaround for host mode VBUS glitch when boot | expand

Message

Frank Li Jan. 23, 2024, 4:42 p.m. UTC
Chagne from v2 to v3
- see notes at patch

Change from v1 to v2:
- splite xhci.h to xchi-port.h and xhci-caps.h to shared marco.
- add quirk subfix
- fixed checkpatch error with --strict.

left one warning to align existed code style.

CHECK: Alignment should match open parenthesis
+	dwc->host_vbus_glitches_quirk = device_property_read_bool(dev,
+				"snps,host-vbus-glitches-quirk");

Frank Li (1):
  XHCI: Separate PORT and CAPs macros into dedicated file

Ran Wang (2):
  dt-bindings: usb: dwc3: Add snps,host-vbus-glitches-quirk avoid vbus
    glitch
  usb: dwc3: Add workaround for host mode VBUS glitch when boot

 .../devicetree/bindings/usb/snps,dwc3.yaml    |   7 +
 drivers/usb/dwc3/core.c                       |   3 +
 drivers/usb/dwc3/core.h                       |   2 +
 drivers/usb/dwc3/host.c                       |  51 ++++
 drivers/usb/host/xhci-caps.h                  |  85 ++++++
 drivers/usb/host/xhci-port.h                  | 176 ++++++++++++
 drivers/usb/host/xhci.h                       | 262 +-----------------
 7 files changed, 327 insertions(+), 259 deletions(-)
 create mode 100644 drivers/usb/host/xhci-caps.h
 create mode 100644 drivers/usb/host/xhci-port.h

Comments

Thinh Nguyen Jan. 24, 2024, 2:11 a.m. UTC | #1
On Tue, Jan 23, 2024, Frank Li wrote:
> From: Ran Wang <ran.wang_1@nxp.com>
> 
> When DWC3 is set to host mode by programming register DWC3_GCTL, VBUS
> (or its control signal) will be turned on immediately on related Root Hub
> ports. Then, the VBUS is turned off for a little while(15us) when do xhci
> reset (conducted by xhci driver) and back to normal finally, we can
> observe a negative glitch of related signal happen.
> 
> This VBUS glitch might cause some USB devices enumeration fail if kernel
> boot with them connected. Such as LS1012AFWRY/LS1043ARDB/LX2160AQDS
> /LS1088ARDB with Kingston 16GB USB2.0/Kingston USB3.0/JetFlash Transcend
> 4GB USB2.0 drives. The fail cases include enumerated as full-speed device
> or report wrong device descriptor, etc.
> 
> One SW workaround which can fix this is by programing all xhci PORTSC[PP]
> to 0 to turn off VBUS immediately after setting host mode in DWC3 driver
> (per signal measurement result, it will be too late to do it in
> xhci-plat.c or xhci.c). Then, after xhci reset complete in xhci driver,
> PORTSC[PP]s' value will back to 1 automatically and VBUS on at that time,
> no glitch happen and normal enumeration process has no impact.
> 
> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
> Reviewed-by: Peter Chen <peter.chen@nxp.com>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
> 
> Notes:
>     Change from v2 to v3
>     - reversed christmas tree
>     - please move major change hunk to the top
>     - Reword "We have to ..." to "Some platforms need to ... "
>     
>     Change from v1 to v2:
>     - split xhci.h
>     Last review at June 06, 2019. Fixed all review comments and sent again.
>     
>     https://urldefense.com/v3/__https://lore.kernel.org/linux-kernel/AM5PR0402MB2865979E26017BC5937DBBA5F1170@AM5PR0402MB2865.eurprd04.prod.outlook.com/__;!!A4F2R9G_pg!YEsCyKK-dC7cMDJENYpU7xC2cfHhLa3SnXoedPYgtS3jP2bar4TF7hAcj2iHY1Mq1dqIXcshBWGmceo9fdjF$ 
> 
>  drivers/usb/dwc3/core.c |  3 +++
>  drivers/usb/dwc3/core.h |  2 ++
>  drivers/usb/dwc3/host.c | 51 +++++++++++++++++++++++++++++++++++++++++
>  3 files changed, 56 insertions(+)
> 
> diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> index 3e55838c00014..3b68e8e45b8b9 100644
> --- a/drivers/usb/dwc3/core.c
> +++ b/drivers/usb/dwc3/core.c
> @@ -1626,6 +1626,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
>  	dwc->dis_split_quirk = device_property_read_bool(dev,
>  				"snps,dis-split-quirk");
>  
> +	dwc->host_vbus_glitches_quirk = device_property_read_bool(dev,
> +				"snps,host-vbus-glitches-quirk");
> +
>  	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
>  	dwc->tx_de_emphasis = tx_de_emphasis;
>  
> diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> index e3eea965e57bf..df544ec730d22 100644
> --- a/drivers/usb/dwc3/core.h
> +++ b/drivers/usb/dwc3/core.h
> @@ -1132,6 +1132,7 @@ struct dwc3_scratchpad_array {
>   *	2	- No de-emphasis
>   *	3	- Reserved
>   * @dis_metastability_quirk: set to disable metastability quirk.
> + * @host_vbus_glitches_quirk: set to avoid vbus glitch during xhci reset.
>   * @dis_split_quirk: set to disable split boundary.
>   * @wakeup_configured: set if the device is configured for remote wakeup.
>   * @suspended: set to track suspend event due to U3/L2.
> @@ -1353,6 +1354,7 @@ struct dwc3 {
>  	unsigned		tx_de_emphasis:2;
>  
>  	unsigned		dis_metastability_quirk:1;
> +	unsigned		host_vbus_glitches_quirk:1;
>  
>  	unsigned		dis_split_quirk:1;
>  	unsigned		async_callbacks:1;
> diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c
> index 61f57fe5bb783..952d73d05dffa 100644
> --- a/drivers/usb/dwc3/host.c
> +++ b/drivers/usb/dwc3/host.c
> @@ -11,8 +11,52 @@
>  #include <linux/of.h>
>  #include <linux/platform_device.h>
>  
> +#include "../host/xhci-port.h"
> +#include "../host/xhci-ext-caps.h"
> +#include "../host/xhci-caps.h"
>  #include "core.h"
>  
> +#define XHCI_HCSPARAMS1		0x4
> +#define XHCI_PORTSC_BASE	0x400
> +
> +/*
> + * dwc3_power_off_all_roothub_ports - Power off all Root hub ports
> + * @dwc3: Pointer to our controller context structure
> + */

If you're trying to follow the kernel-doc style, then please do it
properly with the kernel-doc comment style.

/**
 * ..
 * ..
 */

> +static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
> +{
> +	void __iomem *xhci_regs;
> +	u32 op_regs_base;
> +	int port_num;
> +	u32 offset;
> +	u32 reg;
> +	int i;
> +
> +	/* xhci regs is not mapped yet, do it temperary here */
> +	if (dwc->xhci_resources[0].start) {
> +		xhci_regs = ioremap(dwc->xhci_resources[0].start, DWC3_XHCI_REGS_END);
> +		if (IS_ERR(xhci_regs)) {
> +			dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
> +			return;
> +		}
> +
> +		op_regs_base = HC_LENGTH(readl(xhci_regs));
> +		reg = readl(xhci_regs + XHCI_HCSPARAMS1);
> +		port_num = HCS_MAX_PORTS(reg);
> +
> +		for (i = 1; i <= port_num; i++) {
> +			offset = op_regs_base + XHCI_PORTSC_BASE + 0x10 * (i - 1);
> +			reg = readl(xhci_regs + offset);
> +			reg &= ~PORT_POWER;
> +			writel(reg, xhci_regs + offset);
> +		}
> +
> +		iounmap(xhci_regs);
> +	} else {
> +		dev_err(dwc->dev, "xhci base reg invalid\n");
> +	}
> +}
> +
>  static void dwc3_host_fill_xhci_irq_res(struct dwc3 *dwc,
>  					int irq, char *name)
>  {
> @@ -66,6 +110,13 @@ int dwc3_host_init(struct dwc3 *dwc)
>  	int			ret, irq;
>  	int			prop_idx = 0;
>  
> +	/*
> +	 * Some platforms need to power off all Root hub ports immediately after DWC3 set to host
> +	 * mode to avoid VBUS glitch happen when xhci get reset later.
> +	 */
> +	if (dwc->host_vbus_glitches_quirk)
> +		dwc3_power_off_all_roothub_ports(dwc);
> +
>  	irq = dwc3_host_get_irq(dwc);
>  	if (irq < 0)
>  		return irq;
> -- 
> 2.34.1
> 

Regardless whether you decided to update related the comment above:

Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>

Thanks,
Thinh