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[v6,0/4] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs

Message ID IA1PR20MB4953C774D41EDF1EADB6EC18BB6D2@IA1PR20MB4953.namprd20.prod.outlook.com
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Series riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs | expand

Message

Inochi Amaoto Jan. 14, 2024, 4:15 a.m. UTC 
Add clock controller support for the Sophgo CV1800B, CV1812H and SG2000.

Changed from v5:
1. rebased to mainline master tree
2. add SG2000 clock support.
3. fix document link

Changed from v4:
1. improve code for patch 2
2. remove the already applied bindings
https://lore.kernel.org/all/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com/

Changed from v3:
1. improve comment of patch 3
2. cleanup the include of patch 2

Changed from v2:
1. remove clock-names from bindings.
2. remove clock-frequency node of DT from previous patch.
3. change some unused clock to bypass mode to avoid unlockable PLL.

Changed from v1:
1. fix license issues.


Inochi Amaoto (4):
  dt-bindings: clock: sophgo: Add clock controller of SG2000 series SoC
  clk: sophgo: Add CV1800/SG2000 series clock controller driver
  riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC

 .../bindings/clock/sophgo,cv1800-clk.yaml     |    3 +-
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi       |    4 +
 arch/riscv/boot/dts/sophgo/cv1812h.dtsi       |    4 +
 arch/riscv/boot/dts/sophgo/cv18xx.dtsi        |   22 +-
 drivers/clk/Kconfig                           |    1 +
 drivers/clk/Makefile                          |    1 +
 drivers/clk/sophgo/Kconfig                    |   12 +
 drivers/clk/sophgo/Makefile                   |    7 +
 drivers/clk/sophgo/clk-cv1800.c               | 1545 +++++++++++++++++
 drivers/clk/sophgo/clk-cv1800.h               |  123 ++
 drivers/clk/sophgo/clk-cv18xx-common.c        |   66 +
 drivers/clk/sophgo/clk-cv18xx-common.h        |   81 +
 drivers/clk/sophgo/clk-cv18xx-ip.c            |  905 ++++++++++
 drivers/clk/sophgo/clk-cv18xx-ip.h            |  265 +++
 drivers/clk/sophgo/clk-cv18xx-pll.c           |  425 +++++
 drivers/clk/sophgo/clk-cv18xx-pll.h           |  119 ++
 16 files changed, 3577 insertions(+), 6 deletions(-)
 create mode 100644 drivers/clk/sophgo/Kconfig
 create mode 100644 drivers/clk/sophgo/Makefile
 create mode 100644 drivers/clk/sophgo/clk-cv1800.c
 create mode 100644 drivers/clk/sophgo/clk-cv1800.h
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.c
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.h
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.c
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.h
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.c
 create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.h

--
2.43.0

Comments

Conor Dooley Jan. 15, 2024, 4:35 p.m. UTC | #1 
On Sun, Jan 14, 2024 at 12:16:58PM +0800, Inochi Amaoto wrote:
> SG2000 series SoC has the same clock as CV1810 series, but the clock
> related to A53 is functional in SG2000 series. So a new compatible
> string is needed for the new SoC.
> 
> Add definition for the clock controller of the SG2000 series SoC.
> 
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://github.com/sophgo/sophgo-doc/releases/tag/sg2000-datasheet-v1.0-alpha
> ---
>  Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml b/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml
> index c1dc24673c0d..59ef41adb539 100644
> --- a/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml
> +++ b/Documentation/devicetree/bindings/clock/sophgo,cv1800-clk.yaml
> @@ -4,7 +4,7 @@
>  $id: http://devicetree.org/schemas/clock/sophgo,cv1800-clk.yaml#
>  $schema: http://devicetree.org/meta-schemas/core.yaml#
> 
> -title: Sophgo CV1800 Series Clock Controller
> +title: Sophgo CV1800/SG2000 Series Clock Controller
> 
>  maintainers:
>    - Inochi Amaoto <inochiama@outlook.com>
> @@ -14,6 +14,7 @@ properties:
>      enum:
>        - sophgo,cv1800-clk
>        - sophgo,cv1810-clk
> +      - sophgo,sg2000-clk

I recall before you mentioned that the Sophgo folks were considering
renaming one of their devices. Is the sg2000 the renamed one, or a
different chip?

Thanks,
Conor.