From patchwork Thu Feb 25 11:53:27 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 62879 Delivered-To: patch@linaro.org Received: by 10.112.199.169 with SMTP id jl9csp116916lbc; Thu, 25 Feb 2016 03:56:26 -0800 (PST) X-Received: by 10.98.75.79 with SMTP id y76mr53449779pfa.147.1456401386805; Thu, 25 Feb 2016 03:56:26 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p23si12128102pfj.199.2016.02.25.03.56.26; Thu, 25 Feb 2016 03:56:26 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759631AbcBYL4Z (ORCPT + 6 others); Thu, 25 Feb 2016 06:56:25 -0500 Received: from szxga02-in.huawei.com ([119.145.14.65]:57666 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756414AbcBYL4Y (ORCPT ); Thu, 25 Feb 2016 06:56:24 -0500 Received: from 172.24.1.48 (EHLO szxeml425-hub.china.huawei.com) ([172.24.1.48]) by szxrg02-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DBY09237; Thu, 25 Feb 2016 19:54:37 +0800 (CST) Received: from localhost (10.177.23.164) by szxeml425-hub.china.huawei.com (10.82.67.180) with Microsoft SMTP Server id 14.3.235.1; Thu, 25 Feb 2016 19:54:29 +0800 From: Zhen Lei To: Bjorn Helgaas , linux-pci , Rob Herring , Frank Rowand , Grant Likely , Will Deacon , Pawel Moll , Mark Rutland , Ian Campbell , "Kumar Gala" , linux-arm-kernel , devicetree , linux-kernel CC: Zefan Li , Xinwei Hu , "Tianhong Ding" , Hanjun Guo , "Yijing Wang" , Zhen Lei Subject: [PATCH 1/2] pci/of: to support explicitly declare interrupt pins unused Date: Thu, 25 Feb 2016 19:53:27 +0800 Message-ID: <1456401208-10136-1-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.1 MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090204.56CEEB83.0092, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 55df0abf9d1abffedf1281cd5c31b748 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Interrupt Pin register is read-only and optional. Some pci devices may use msi/msix but leave the value of Interrupt Pin non-zero. In this case, the driver will print information as below: pci 0000:40:00.0: of_irq_parse_pci() failed with rc=-22 It's easily lead to misinterpret. Signed-off-by: Zhen Lei --- drivers/of/of_pci_irq.c | 43 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 40 insertions(+), 3 deletions(-) -- 2.5.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/of/of_pci_irq.c b/drivers/of/of_pci_irq.c index 2306313..a6d51e0 100644 --- a/drivers/of/of_pci_irq.c +++ b/drivers/of/of_pci_irq.c @@ -4,6 +4,38 @@ #include /** + * of_irq_skip_pci - Skip the interrupt pins for a PCI device + * @pdev: the device whose interrupt pins may be skipped + * @dn: device node of pdev or pdev's ancestral bus + * + * Interrupt Pin register is read-only and optional. Some pci devices may use + * msi/msix but leave the value of Interrupt Pin non-zero. This function give + * an opportunity to suppress the warning about of_irq_parse_pci() failed. + */ +static int of_irq_skip_pci(const struct pci_dev *pdev, + const struct device_node *dn) +{ + const __be32 *skip_mask, *end; + u32 addr, mask; + int len; + + skip_mask = of_get_property(dn, "interrupt-skip-mask", &len); + if (!skip_mask) + return 0; + + end = skip_mask + (len / sizeof(__be32)); + addr = (pdev->bus->number << 16) | (pdev->devfn << 8); + + while (skip_mask < end) { + mask = be32_to_cpu(*(skip_mask++)); + if ((addr & ~mask) == 0) + return 1; + } + + return 0; +} + +/** * of_irq_parse_pci - Resolve the interrupt for a PCI device * @pdev: the device whose interrupt is to be resolved * @out_irq: structure of_irq filled by this function @@ -30,6 +62,9 @@ int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq rc = of_irq_parse_one(dn, 0, out_irq); if (!rc) return rc; + + if (of_irq_skip_pci(pdev, dn)) + return -ENODEV; } /* Ok, we don't, time to have fun. Let's start by building up an @@ -89,9 +124,11 @@ int of_irq_parse_pci(const struct pci_dev *pdev, struct of_phandle_args *out_irq laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8)); laddr[1] = laddr[2] = cpu_to_be32(0); rc = of_irq_parse_raw(laddr, out_irq); - if (rc) - goto err; - return 0; + if (!rc) + return 0; + + if (of_irq_skip_pci(pdev, ppnode)) + return -ENODEV; err: dev_err(&pdev->dev, "of_irq_parse_pci() failed with rc=%d\n", rc); return rc;