From patchwork Fri May 13 03:46:54 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 67712 Delivered-To: patch@linaro.org Received: by 10.140.92.199 with SMTP id b65csp59602qge; Thu, 12 May 2016 20:47:41 -0700 (PDT) X-Received: by 10.66.25.112 with SMTP id b16mr19153696pag.154.1463111261316; Thu, 12 May 2016 20:47:41 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y10si21929941pas.77.2016.05.12.20.47.41; Thu, 12 May 2016 20:47:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752682AbcEMDrX (ORCPT + 7 others); Thu, 12 May 2016 23:47:23 -0400 Received: from mail-oi0-f42.google.com ([209.85.218.42]:36236 "EHLO mail-oi0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752653AbcEMDrV (ORCPT ); Thu, 12 May 2016 23:47:21 -0400 Received: by mail-oi0-f42.google.com with SMTP id x201so152239586oif.3 for ; Thu, 12 May 2016 20:47:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=YdQLx1v+8jd7Q5JOSpPW3NR+seFjoEwJIySXeov/Qho=; b=XBfhyT0CMBi2z/9yYxvFFM3sPuDoorPyy+jY8NjEJvTH4ons2spPWk18dVSFvdAfVf m7oKmaF214MrPDNXLlItnYWjAH83o7WGl7CWWBqINHwpbIGUiga7DD8Uia1v3j7FwK7F B8Zw7VFIj+bUd5RBG4U2mS9ePBqdwfhf+mNlM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=YdQLx1v+8jd7Q5JOSpPW3NR+seFjoEwJIySXeov/Qho=; b=khCPMqmpzhGYWD3wdWmni3mZR1xN69oP/J/dqTEp+FnYU1DCSjGHzF37E8XT7qAtb0 sfswVDFKJLZZEGifOsLti8aPo/WUnUDZl2JstuKyhZIQ/JHG/HNCSFnCLriHdpGcJfEd hSKGkZk0mWMNKOhuYyHWms9b4Xqe1YF6wu8BWkcyaWIFDCdFQATs8LukBjjJGS4y4jG2 am8CgqS13jci7CZulQw/nXmSqy3g70yla2DqoQBORWgBHUjo3pPuN1aeinA/RkE6uAEm FVTZm+Il5+cf/Qn7VbmwdALW2sJhbEd3yq6/veEXHgkXHBGU5p3k1E/VLElm/g9IH0u+ mw+g== X-Gm-Message-State: AOPr4FXqgBkD98mYciu1aW1+vfvisB3MBuclaC5nWe+T8xpyyIcoUTATTUdim13nl5ReyMZx X-Received: by 10.202.66.135 with SMTP id p129mr7781805oia.153.1463111241144; Thu, 12 May 2016 20:47:21 -0700 (PDT) Received: from localhost (108-85-129-155.lightspeed.austtx.sbcglobal.net. [108.85.129.155]) by smtp.gmail.com with ESMTPSA id h9sm4799676otb.17.2016.05.12.20.47.20 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Thu, 12 May 2016 20:47:20 -0700 (PDT) From: Andy Gross To: linux-arm-msm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Stephen Boyd , devicetree@vger.kernel.org, jilai wang , Andy Gross Subject: [Patch v5 1/8] dt/bindings: firmware: Add Qualcomm SCM binding Date: Thu, 12 May 2016 22:46:54 -0500 Message-Id: <1463111221-6963-2-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1463111221-6963-1-git-send-email-andy.gross@linaro.org> References: <1463111221-6963-1-git-send-email-andy.gross@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This patch adds the device tree support for the Qualcomm SCM firmware. Signed-off-by: Andy Gross --- .../devicetree/bindings/firmware/qcom,scm.txt | 28 ++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/firmware/qcom,scm.txt -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt new file mode 100644 index 0000000..3b4436e --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt @@ -0,0 +1,28 @@ +QCOM Secure Channel Manager (SCM) + +Qualcomm processors include an interface to communicate to the secure firmware. +This interface allows for clients to request different types of actions. These +can include CPU power up/down, HDCP requests, loading of firmware, and other +assorted actions. + +Required properties: +- compatible: must contain one of the following: + * "qcom,scm-apq8064" for APQ8064 platforms + * "qcom,scm-msm8660" for MSM8660 platforms + * "qcom,scm-msm8690" for MSM8690 platforms + * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) +- clocks: One to three clocks may be required based on compatible. + * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" + * Core, iface, and bus clocks required for "qcom,scm" +- clock-names: Must contain "core" for the core clock, "iface" for the interface + clock and "bus" for the bus clock per the requirements of the compatible. + +Example for MSM8916: + + firmware { + scm { + compatible = "qcom,scm"; + clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; + clock-names = "core", "bus", "iface"; + }; + };