From patchwork Thu Sep 13 00:51:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 146585 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp8214ljw; Wed, 12 Sep 2018 17:52:18 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbTKwmQ5oOeQaAFdQY44GSFd87i9HjsdJhl9O6dEg6BDF7Xo3mbK1b9xB64QS/rXPFZZkac X-Received: by 2002:a17:902:7b96:: with SMTP id w22-v6mr4710959pll.24.1536799938316; Wed, 12 Sep 2018 17:52:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1536799938; cv=none; d=google.com; s=arc-20160816; b=s3yS0CQxhpUS75yYEzXhU2nFwEQh1X57hZsN0LsMTZeLP7qephKjHKvpjRi+NPUC51 8GmMO87o2xz36eWVpnHkOq0Y2xmCyGDMXGc8eCaqa3buiKcH/KAVcaIE9ZyboeDMJEhK s5RydEJeMSPNUSLTSJlRiwplE7wlpRQSO9RB4hqWyHCTFpkysetYjpMH0m0B3AlDsVDq nhVQz24yAbDa0ygocIxiThXfMV6aHhb+s0D+p3xCGIsgcSdW1yJaAhp4RtWOAlLI81DM Wr7EPd16SF7jET1HZ7vQakIpSK7yfHWRTQOZ9mOOk2ASKGtBjf2GV3oSyViA3hHmTYqB 1Guw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:dkim-filter; bh=4ks2z2OToVs52EUl/Ow1jOy3lg6t8i6aoijLCPSqC0I=; b=SCgbTgDvTk5vSgcUAGdqiP0IYIjQbOZrB51ySvHU7K4XSxWjVqTfv3cs4OGynxbmil cppIupiDnKI019foa2ZYC5oTVJsoinVk1SDMpxNjXHK+8PNnsPMF4a6TNdpdsnzG5YU2 tpchR3nN2+jcbmq+Ota9xNNajPA0si0sNNnZi/Kw6crbF2IKvMRPZ4tMevDXDeXVzbkm +bs9fSLB9XGFNl12/W6L+Hr0qYPkfAS8JCoHBOe88NadE9fQOn5rV/I9AEQOV+NXjeBu luf5+vXQcwCBvU9+JS5+vXKaZjYjtNGFQvElkDqGgHBQioGI0z3Ot8i3TWEc3e8GfWah PWUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b="z/TWjRRD"; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s65-v6si2565520pfb.271.2018.09.12.17.52.15; Wed, 12 Sep 2018 17:52:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@nifty.com header.s=dec2015msa header.b="z/TWjRRD"; spf=pass (google.com: best guess record for domain of dmaengine-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=dmaengine-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726680AbeIMF7R (ORCPT + 3 others); Thu, 13 Sep 2018 01:59:17 -0400 Received: from conuserg-08.nifty.com ([210.131.2.75]:59704 "EHLO conuserg-08.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726409AbeIMF7R (ORCPT ); Thu, 13 Sep 2018 01:59:17 -0400 Received: from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-08.nifty.com with ESMTP id w8D0pLtR019994; Thu, 13 Sep 2018 09:51:22 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-08.nifty.com w8D0pLtR019994 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1536799882; bh=4ks2z2OToVs52EUl/Ow1jOy3lg6t8i6aoijLCPSqC0I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=z/TWjRRDM6Mlo3FbmbMXypnGt3C1cCJ7eAwyMqo36uePye9yIKJhzmJP/QRZ8WMAL 2XSNBtSjS00U8X0nSl4DqRx4ZYqSmDYdxCUyNdLWm7F84+28q7fdFfWEi4+G0pzP5J 9eAec1lHKxzea7EDD325sPcRRhq46o5KTxgicj/MRc2iev9Ed2bE0EjCU4u+zMuYA9 qlJXB7IduHLn6e8FA9rQqQXDebPNrnOAGHmZOUDEPoQGgYZKm3TJBoO8lLywK+qERI sZkw0CDT5/ISXU6O0BlWlfGC1oICp+WYF8FUaF27oyvHgbg91mdahoY9hKBGTV3+9j ldmGdbhk8U0xQ== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: Vinod Koul , dmaengine@vger.kernel.org Cc: Masami Hiramatsu , Jassi Brar , Masahiro Yamada , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Mark Rutland , linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 1/2] dt-bindings: dmaengine: add DT binding for UniPhier MIO DMAC Date: Thu, 13 Sep 2018 09:51:08 +0900 Message-Id: <1536799869-10643-2-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1536799869-10643-1-git-send-email-yamada.masahiro@socionext.com> References: <1536799869-10643-1-git-send-email-yamada.masahiro@socionext.com> Sender: dmaengine-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: dmaengine@vger.kernel.org The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada Reviewed-by: Rob Herring --- Changes in v3: - Add Rob's Reviewed-by Changes in v2: - Rename the node "dmac" to "dma-controller" - Remove dma-channels property .../devicetree/bindings/dma/uniphier-mio-dmac.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt new file mode 100644 index 0000000..b12388d --- /dev/null +++ b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt @@ -0,0 +1,25 @@ +UniPhier Media IO DMA controller + +This works as an external DMA engine for SD/eMMC controllers etc. +found in UniPhier LD4, Pro4, sLD8 SoCs. + +Required properties: +- compatible: should be "socionext,uniphier-mio-dmac". +- reg: offset and length of the register set for the device. +- interrupts: a list of interrupt specifiers associated with the DMA channels. +- clocks: a single clock specifier. +- #dma-cells: should be <1>. The single cell represents the channel index. + +Example: + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + clocks = <&mio_clk 7>; + #dma-cells = <1>; + }; + +Note: +In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo. +The first two channels share a single interrupt line.