From patchwork Thu Jun 18 08:38:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 191090 Delivered-To: patch@linaro.org Received: by 2002:a54:30ca:0:0:0:0:0 with SMTP id e10csp1125989ecs; Thu, 18 Jun 2020 01:39:01 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzdVFD4uXkmmfi4Z8UxUvuMyR6aDAWKqfDiANMR9NDo55GVqITLlhqLMUcxITlvPcEVyZ/G X-Received: by 2002:a05:6402:1243:: with SMTP id l3mr3190318edw.64.1592469541683; Thu, 18 Jun 2020 01:39:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592469541; cv=none; d=google.com; s=arc-20160816; b=OSE3qAM0lTxIEWAD6aKaYf6HMMDG/mIqzdlLblnh2KBFqXI/V7/N7xcItmj5R1fiSM P3ytIRG4VO6F+hCSXpUfzNxa1Buiv8ZPNmGjlHuDFOG9VFkZ3ftyEHHCyQxMy1YjBd7N LiXh2IJTBlzrVAsB7OKIvNgn0yMU52pgeYM3fKF3Oad5nxVECysiUcPEoAQGfGlfDtdJ vM84wrEemu4vieZaKbA0vZwetD6x9S/pshv2Ueb7gZKGKsPkxfrhiDBbkZ8dGQDfWz6f Bbbm4idfIy/1kUJh3o9zqvw0i4aIgxVKrOzQrRPPhNmcwf5ePSXMTj0bQUVs2tVdMY5a PNnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=iNyGXIz9dONTOXOlMLSYb2cRqQEeEfLk2q00wmZ33oo=; b=vQZYF6rCvVPDWyktdhU6Zp3aIzSGNEFPFOorjXwsExUXtWWkxqE9hXwHLGrsWDnjHV INBwzKh04lSd9ERv3wbYB+zsEHislz4rIEA7ama9GHz6RKrJq6qFRQXLFNoriJ4kipgG jk7qcv0BerSsvmBZLVXJxaOnHHp6+wPfOT5szFPV7wjrBVsOhRH3WwClNlnAYDyEET21 jikQa0NW9WaNYZggX6IeAYP0a8kr2toCSV33wjLw0BzO3xb+KkQXjai5sACDvOl769lT 414ik8x9zjNz4jgUnmT+JHufBHbH/OMmMbEb/ox8XHFTy2LqrjpzWz+lwj8THyhKQBxB a7GQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a15si1490925ejd.215.2020.06.18.01.39.01; Thu, 18 Jun 2020 01:39:01 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728842AbgFRIib (ORCPT + 6 others); Thu, 18 Jun 2020 04:38:31 -0400 Received: from mx.socionext.com ([202.248.49.38]:19342 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727839AbgFRIi0 (ORCPT ); Thu, 18 Jun 2020 04:38:26 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 18 Jun 2020 17:38:24 +0900 Received: from mail.mfilter.local (m-filter-2 [10.213.24.62]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 528D6180B51; Thu, 18 Jun 2020 17:38:24 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Thu, 18 Jun 2020 17:38:24 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id D09501A12AD; Thu, 18 Jun 2020 17:38:23 +0900 (JST) From: Kunihiko Hayashi To: Bjorn Helgaas , Lorenzo Pieralisi , Jingoo Han , Gustavo Pimentel , Rob Herring , Masahiro Yamada , Marc Zyngier Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v5 1/6] PCI: dwc: Add msi_host_isr() callback Date: Thu, 18 Jun 2020 17:38:08 +0900 Message-Id: <1592469493-1549-2-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592469493-1549-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1592469493-1549-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds msi_host_isr() callback function support to describe SoC-dependent service triggered by MSI. For example, when AER interrupt is triggered by MSI, the callback function reads SoC-dependent registers and detects that the interrupt is from AER, and invoke AER interrupts related to MSI. Cc: Marc Zyngier Cc: Jingoo Han Cc: Gustavo Pimentel Signed-off-by: Kunihiko Hayashi Acked-by: Gustavo Pimentel --- drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++ drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 4 insertions(+) -- 2.7.4 diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 0a4a5aa..026edb1 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -83,6 +83,9 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) u32 status, num_ctrls; irqreturn_t ret = IRQ_NONE; + if (pp->ops->msi_host_isr) + pp->ops->msi_host_isr(pp); + num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; for (i = 0; i < num_ctrls; i++) { diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 656e00f..e741967 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -170,6 +170,7 @@ struct dw_pcie_host_ops { void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); + void (*msi_host_isr)(struct pcie_port *pp); }; struct pcie_port {