From patchwork Fri Aug 7 10:25:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kunihiko Hayashi X-Patchwork-Id: 247552 Delivered-To: patch@linaro.org Received: by 2002:a92:cc90:0:0:0:0:0 with SMTP id x16csp2312737ilo; Fri, 7 Aug 2020 03:25:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyKT9JUJWxs0f/12rbRuOF7bgZCuFAtr94i8wbRXf7kVRtaSIY8/jISFrgoqFzIz9hmBmEB X-Received: by 2002:a17:906:5902:: with SMTP id h2mr9080241ejq.423.1596795952818; Fri, 07 Aug 2020 03:25:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1596795952; cv=none; d=google.com; s=arc-20160816; b=wwEZvYeoX9wv8FutQB8c0t73GY6oLxjI1S7Xz3tjUlaN4h7hcRdiXn7IDgJ15w7Pqu CBoE0xm0L2N6Pfl0rzIOVRwwKuCpjzT1r55QcQI2fmH46h1by0UWAvBMQ+6ly93uGHeJ Q1uHZ/o6MLVBS4F7+1usdEll5b+tosc2FfGcHjbAmYboEldOddC8Dd4ewB437nJuYaT1 ieCZOMLrk6QgB7KCFqnr6V462DCKHc6Nk0KSzn7S97LS29Q1yALHtzj2MS1j1gc3ZCNI DIJtxWthN0YOB5PQkD/SNInFjj5JFtS84K9/hhyQmDA3mlIpzcUMiAnhHC1BsFXxZ+45 wyyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=jMZ9Np59mwhB1Am+VWBP836eeb5+NFJxhLBg98/mYBo=; b=rRPBINKbOOeCVz9GNB+YZrGnadT6K+cF6VfXWHxSCE8YWbOfGruhWPlr7NdWMySy3r M6C18A7uEj08vb8ZgfiwwT3RDaNeGju4QblUsA/3TKGRmnQq55cb1OJMVLU1RFsN88PA 8iYes9U+JN96x1A7+ZtKnCt/qhl8cUT+EZmhOIFfmzKY8g2q6WGRYgjqEfZCv+OHiyhe odjtcyYFlREgUUVacWJnQ7WDDeOwJQmNurPXURrvoK44SVNliplWibZkt2x4v7PqLX7t tMyvc/cjhCjWTGt8lPxjraDWbmIhWlm37YCs9JtAYC12SzMLjK+hqtyaT1MwDWnHqc5Q JTXw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e17si5733132edc.382.2020.08.07.03.25.52; Fri, 07 Aug 2020 03:25:52 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728292AbgHGKZv (ORCPT + 6 others); Fri, 7 Aug 2020 06:25:51 -0400 Received: from mx.socionext.com ([202.248.49.38]:31578 "EHLO mx.socionext.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726619AbgHGKZc (ORCPT ); Fri, 7 Aug 2020 06:25:32 -0400 Received: from unknown (HELO kinkan-ex.css.socionext.com) ([172.31.9.52]) by mx.socionext.com with ESMTP; 07 Aug 2020 19:25:30 +0900 Received: from mail.mfilter.local (m-filter-1 [10.213.24.61]) by kinkan-ex.css.socionext.com (Postfix) with ESMTP id 8D29A180BB5; Fri, 7 Aug 2020 19:25:30 +0900 (JST) Received: from 172.31.9.51 (172.31.9.51) by m-FILTER with ESMTP; Fri, 7 Aug 2020 19:25:30 +0900 Received: from plum.e01.socionext.com (unknown [10.213.132.32]) by kinkan.css.socionext.com (Postfix) with ESMTP id 2A0681A050B; Fri, 7 Aug 2020 19:25:30 +0900 (JST) From: Kunihiko Hayashi To: Lorenzo Pieralisi , Bjorn Helgaas , Jingoo Han , Gustavo Pimentel , Rob Herring , Masahiro Yamada , Marc Zyngier Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Masami Hiramatsu , Jassi Brar , Kunihiko Hayashi Subject: [PATCH v6 2/6] PCI: dwc: Add msi_host_isr() callback Date: Fri, 7 Aug 2020 19:25:18 +0900 Message-Id: <1596795922-705-3-git-send-email-hayashi.kunihiko@socionext.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1596795922-705-1-git-send-email-hayashi.kunihiko@socionext.com> References: <1596795922-705-1-git-send-email-hayashi.kunihiko@socionext.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds msi_host_isr() callback function support to describe SoC-dependent service triggered by MSI. For example, when AER interrupt is triggered by MSI, the callback function reads SoC-dependent registers and detects that the interrupt is from AER, and invoke AER interrupts related to MSI. Cc: Marc Zyngier Cc: Jingoo Han Cc: Gustavo Pimentel Signed-off-by: Kunihiko Hayashi Acked-by: Gustavo Pimentel --- drivers/pci/controller/dwc/pcie-designware-host.c | 3 +++ drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 4 insertions(+) -- 2.7.4 Acked-by: Rob Herring diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 9dafecb..7948bf1 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -83,6 +83,9 @@ irqreturn_t dw_handle_msi_irq(struct pcie_port *pp) u32 status, num_ctrls; irqreturn_t ret = IRQ_NONE; + if (pp->ops->msi_host_isr) + pp->ops->msi_host_isr(pp); + num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; for (i = 0; i < num_ctrls; i++) { diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index f911760..401cbd9 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -170,6 +170,7 @@ struct dw_pcie_host_ops { void (*scan_bus)(struct pcie_port *pp); void (*set_num_vectors)(struct pcie_port *pp); int (*msi_host_init)(struct pcie_port *pp); + void (*msi_host_isr)(struct pcie_port *pp); }; struct pcie_port {