From patchwork Fri Nov 6 18:38:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Taniya Das X-Patchwork-Id: 321345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27EA9C388F2 for ; Fri, 6 Nov 2020 18:39:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B862221D46 for ; Fri, 6 Nov 2020 18:39:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="giw3Wy6o" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728036AbgKFSjc (ORCPT ); Fri, 6 Nov 2020 13:39:32 -0500 Received: from z5.mailgun.us ([104.130.96.5]:29052 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726415AbgKFSjc (ORCPT ); Fri, 6 Nov 2020 13:39:32 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1604687971; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=q41jYODzwoaR+ygNJ5mFB6dSauU1naWcl3L+q392400=; b=giw3Wy6o21FG4Ty+DtWIVNjqep6FYDzDjFTgFzf3VGbCoIhj3iOvO9VXBm6UZX0jlMLipBBw JLHO1N1HwjtIMuQD1R/tH+hkIyDH8Pg1CMrEFwuIshIvlkcOKWLiONNSn0GGsGkHczuNjyNM QK3ryEm9m6b+MCkrmd69lvtE+OI= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-west-2.postgun.com with SMTP id 5fa5982f60d9475652a41711 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 06 Nov 2020 18:38:39 GMT Sender: tdas=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 4FDC7C433CB; Fri, 6 Nov 2020 18:38:39 +0000 (UTC) Received: from tdas-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tdas) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7D3BFC433C8; Fri, 6 Nov 2020 18:38:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7D3BFC433C8 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=tdas@codeaurora.org From: Taniya Das To: Rob Herring , Bjorn Andersson Cc: Douglas Anderson , Stephen Boyd , Andy Gross , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Taniya Das Subject: [PATCH v1] arm64: dts: sc7180: Add camera clock controller node Date: Sat, 7 Nov 2020 00:08:27 +0530 Message-Id: <1604687907-25712-1-git-send-email-tdas@codeaurora.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the camera clock controller node supported on SC7180. Signed-off-by: Taniya Das Reviewed-by: Douglas Anderson --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation. diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index f5ef2cb..e795dba 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -5,6 +5,7 @@ * Copyright (c) 2019, The Linux Foundation. All rights reserved. */ +#include #include #include #include @@ -2896,6 +2897,18 @@ qcom,bcm-voters = <&apps_bcm_voter>; }; + camcc: clock-controller@ad00000 { + compatible = "qcom,sc7180-camcc"; + reg = <0 0x0ad00000 0 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_CAMERA_AHB_CLK>, + <&gcc GCC_CAMERA_XO_CLK>; + clock-names = "bi_tcxo", "iface", "xo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; + mdss: mdss@ae00000 { compatible = "qcom,sc7180-mdss"; reg = <0 0x0ae00000 0 0x1000>;