From patchwork Wed Mar 16 17:35:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sankeerth Billakanti \(QUIC\)" X-Patchwork-Id: 551945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFBA4C433FE for ; Wed, 16 Mar 2022 17:36:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357638AbiCPRiL (ORCPT ); Wed, 16 Mar 2022 13:38:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43046 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357657AbiCPRiK (ORCPT ); Wed, 16 Mar 2022 13:38:10 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3A1B69493; Wed, 16 Mar 2022 10:36:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1647452213; x=1678988213; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=EoW94ZckvA5awhywuafl9mc4HFelLFPLeZayBs/fPk0=; b=kTv19/LZSLJCPjOfZujdmShGlpkJiU1UjraAKwmn4EY7R+poLMXuwE84 EXHJV95QVCYRd2yvxgWC88pVve6ugmLvDBJSjAd1F/ZNgQ6D/CTHH7rro 7dgaZ+ZGN1ztUWvHDJiyQM0Rv8akVokAOWcpeljmtj9A5vnzUgAWpykJd M=; Received: from unknown (HELO ironmsg01-sd.qualcomm.com) ([10.53.140.141]) by alexa-out-sd-02.qualcomm.com with ESMTP; 16 Mar 2022 10:36:51 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg01-sd.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Mar 2022 10:36:51 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 16 Mar 2022 10:36:51 -0700 Received: from sbillaka-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Wed, 16 Mar 2022 10:36:43 -0700 From: Sankeerth Billakanti To: , , , , CC: Sankeerth Billakanti , , , , , , , , , , , , , , , , , , Subject: [PATCH v5 3/9] arm64: dts: qcom: sc7280: Enable backlight for eDP panel Date: Wed, 16 Mar 2022 23:05:48 +0530 Message-ID: <1647452154-16361-4-git-send-email-quic_sbillaka@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1647452154-16361-1-git-send-email-quic_sbillaka@quicinc.com> References: <1647452154-16361-1-git-send-email-quic_sbillaka@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable backlight support for eDP panel on CRD platform for sc7280. Signed-off-by: Sankeerth Billakanti --- Changes in v5: - Separate out backlight nodes arch/arm64/boot/dts/qcom/sc7280-crd.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7280-crd.dts b/arch/arm64/boot/dts/qcom/sc7280-crd.dts index 2df654e..16d1a5b 100644 --- a/arch/arm64/boot/dts/qcom/sc7280-crd.dts +++ b/arch/arm64/boot/dts/qcom/sc7280-crd.dts @@ -37,6 +37,15 @@ pinctrl-0 = <&edp_panel_power>; }; + edp_backlight: edp-backlight { + compatible = "pwm-backlight"; + + power-supply = <&vreg_edp_bp>; + pwms = <&pm8350c_pwm 3 65535>; + + enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; + }; + vreg_edp_bp: vreg-edp-bp-regulator { compatible = "regulator-fixed"; regulator-name = "vreg_edp_bp"; @@ -123,7 +132,9 @@ ap_ts_pen_1v8: &i2c13 { edp_panel: edp-panel { compatible = "edp-panel"; + backlight = <&edp_backlight>; power-supply = <&edp_3v3_regulator>; + ports { #address-cells = <1>; #size-cells = <0>; @@ -172,6 +183,13 @@ ap_ts_pen_1v8: &i2c13 { }; }; +&pm8350c_pwm { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&edp_bl_pwm>; +}; + &tlmm { edp_panel_power: edp-panel-power { pins = "gpio80";