From patchwork Tue Feb 6 12:58:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 126998 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp2894160ljc; Tue, 6 Feb 2018 04:59:46 -0800 (PST) X-Google-Smtp-Source: AH8x227fOAmQlhtg5ZcFNyw+3K9JujvYnGiEfaQqW+9evkoy6srnCA7uNCyidZMPAWdcWFq3Pn0c X-Received: by 2002:a17:902:3a3:: with SMTP id d32-v6mr2294569pld.193.1517921986565; Tue, 06 Feb 2018 04:59:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1517921986; cv=none; d=google.com; s=arc-20160816; b=08gRW84s6kY6dyx4Hl4mqmx3IXKlsosmW0T6p2PWcsqvhwdFoZ6tC/OvfmsRv4cF7l U5qXg0cAhR3GS9qIsf5yLF1ZYS6RrljfEEzM6Amth4socFC9+Iw7ezTZpKuz/4rx5XYK 5loCU1apEcUkjQoEipNh/jdFUVHvAOB2NeRXCjPhh8vUA9azZNEKK7/RcmAfA1JOVjvT jP6HSkGH/YCK5vwNBHb2eih1z8SinzH4Wv1KS6/7wlbfmEal2vm4vAIWQqWOYLI8tzWj 101xfVozG9TLVE3rLm0bqtOI0xCtWViIun9ViohL22BmcYb3Ob7OFlesvfGmzyAm+Bvb v89w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=WKKqTkHtiMe/5coVsrsZnnPD7FBB/VUfeq4TPtTPMSY=; b=jgWX8z+Otasni4GC9ebG90SheFY8onwkZv5mnc4owWay+TOlM96u5Paw87fjY3sDFs Khh1PzTxuXn3vVg868GmifVHrGueZtWpm2xtGXuvOoF+Y0Cgg3lGtINYzBryoiVelBGR Qodt/QMiynRRLYIcfOhvkLwmaaH+lDZo6oSgb9zCOiTOPiJiJS1z6JlFEhZEabZ9Ep2S aRmEk3V9kej6el54P8Uay9OAnSz3i2Fd394BO8RJaYX4DSVy0wpBMuh+SbeHwcoDJOxm t+sQehyzB3b6ydVcamWXaAEKDHEpkB3IwQ+q82axbvNIHaXwC4E9+AkhH6OS8un6zExe P9Ig== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jE31D5oo; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u71si2821817pgb.453.2018.02.06.04.59.46; Tue, 06 Feb 2018 04:59:46 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=jE31D5oo; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752921AbeBFM7o (ORCPT + 6 others); Tue, 6 Feb 2018 07:59:44 -0500 Received: from lelnx193.ext.ti.com ([198.47.27.77]:55237 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753120AbeBFM7c (ORCPT ); Tue, 6 Feb 2018 07:59:32 -0500 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id w16Cx0UC021028; Tue, 6 Feb 2018 06:59:00 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1517921941; bh=phxvtFZQQ5B1oFMZyXAflWCP8CaVqk32ik+t02RngWo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jE31D5oo2jkB+nJhwoSm/Lay+cdV2dSZWdGvg5X1cq8NRrjMjQR+S9ky2DaX5bWTy Sipq+9p7R1rftVMCxf/2sc81Rck3O3P514eW4akMDxMv9ftOLEgNjDwwjL85HD8B53 LAdKMHAuRow65QyWoyQfb9Ok2rmXpFxOn49x3pmE= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w16Cx0vN006323; Tue, 6 Feb 2018 06:59:00 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Tue, 6 Feb 2018 06:59:00 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Tue, 6 Feb 2018 06:59:00 -0600 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w16CwHXg007055; Tue, 6 Feb 2018 06:58:57 -0600 From: Kishon Vijay Abraham I To: =?utf-8?q?Beno=C3=AEt_Cousson?= , Tony Lindgren , Rob Herring CC: Mark Rutland , Russell King , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 12/15] ARM: dts: dra71-evm: Select pull down for mmc1_clk line in default mode Date: Tue, 6 Feb 2018 18:28:03 +0530 Message-ID: <20180206125806.19350-13-kishon@ti.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206125806.19350-1-kishon@ti.com> References: <20180206125806.19350-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org During a short period when the bus voltage is switched from 3.3v to 1.8v, (to enumerate UHS mode), the mmc module is disabled and the mmc IO lines are kept in a state according to the programmed pad mux pull type. According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the host should hold CLK low for at least 5ms. In order to keep the card line low during voltage switch, the pad mux of mmc1_clk line should be configured to pull down. This is specific only to dra71-evm (and not all dra72 based boards) since mmc1_clk line in dra71-evm is not connected to an external pullup. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra71-evm.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) -- 2.11.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/dra71-evm.dts b/arch/arm/boot/dts/dra71-evm.dts index 64363f75c01a..ebc4bbae981e 100644 --- a/arch/arm/boot/dts/dra71-evm.dts +++ b/arch/arm/boot/dts/dra71-evm.dts @@ -50,6 +50,19 @@ }; }; +&dra7_pmx_core { + mmc1_pins_default: mmc1_pins_default { + pinctrl-single,pins = < + DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */ + DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */ + DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */ + DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */ + DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */ + DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */ + >; + }; +}; + &i2c1 { status = "okay"; clock-frequency = <400000>;