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[209.132.180.67]) by mx.google.com with ESMTP id 72si44638366plb.224.2018.12.31.10.56.07; Mon, 31 Dec 2018 10:56:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DAfoUXX2; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727825AbeLaS4G (ORCPT + 7 others); Mon, 31 Dec 2018 13:56:06 -0500 Received: from mail-pl1-f194.google.com ([209.85.214.194]:44797 "EHLO mail-pl1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727822AbeLaS4F (ORCPT ); Mon, 31 Dec 2018 13:56:05 -0500 Received: by mail-pl1-f194.google.com with SMTP id e11so12884079plt.11 for ; Mon, 31 Dec 2018 10:56:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xnTFjl+GiCKiqWScUNzvjAlPROFJTsMxFZH/vteR13U=; b=DAfoUXX2Mm4QCjZqfBd/jHNgGDXixo8Idl2Ej2QqqP8eRoI+RjdqXc//NL6yfnGUki x96pi+g9+u6YtEP3M6799NXkX8CxIyuptrQkPatVQ/7t4Wpa9OBmKzf2ffLtp1crXjcD 0onod/iPgWI3xVsGvCupVe1PmvzcKQWx74o8g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xnTFjl+GiCKiqWScUNzvjAlPROFJTsMxFZH/vteR13U=; b=NUEVxmGuT5xQqeayVkouFoU4etHvMx/uwo/yv8jWGDNpua3QTSUx+VhcHz+23i2L1d QnOoNgLTtngkchWWHL3zr5p9wjmJNPjMEzvAHiOSEPQYzUwdL8jD3at5MnbpP4pVZ9wo c3Wzbb1v972YzN91ojMxY7eTK+lincQUF7IvRJ8h+Rs5WIIXwIRVwX8RMoW2ATLIOZMu zFa965q6TtE9AR0ki7v8Y0QrJ0+WUM/BDVVDyGlc+ZxWVX3xnRQrPWGOkCjVEmRxLr/C R0RZAwMBtVDLRcNbZ6onjp85xsdRNHuQsvkb+g1NliszOwi4IDdyzs3RGWpM/PglWq4G 0fLw== X-Gm-Message-State: AJcUukdCnMOIT7V5QUPsv3Y6Q28Kcz19+jj28C8ah6VNwQZ8gQtnbgqR HP7R9hzuNUrYpdx5Ma+pWspI X-Received: by 2002:a17:902:3064:: with SMTP id u91mr37492748plb.325.1546282563704; Mon, 31 Dec 2018 10:56:03 -0800 (PST) Received: from localhost.localdomain ([2405:204:7440:b882:8d58:e15f:9ff4:efc2]) by smtp.gmail.com with ESMTPSA id s9sm66146224pgl.88.2018.12.31.10.55.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 31 Dec 2018 10:56:03 -0800 (PST) From: Manivannan Sadhasivam To: sboyd@kernel.org, mturquette@baylibre.com, afaerber@suse.de, robh+dt@kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam , Edgar Bernardi Righi Subject: [PATCH 4/6] ARM: dts: Remove fake UART clock for S500 based SBCs Date: Tue, 1 Jan 2019 00:25:15 +0530 Message-Id: <20181231185517.18517-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181231185517.18517-1-manivannan.sadhasivam@linaro.org> References: <20181231185517.18517-1-manivannan.sadhasivam@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Since Actions Semi S500 SoC has gained support for Clock Management Unit in kernel, let's remove the fake UART clocks from Cubieboard6, Guitar and Sparky SBCs. Signed-off-by: Edgar Bernardi Righi Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/owl-s500-cubieboard6.dts | 7 ------- arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts | 7 ------- arch/arm/boot/dts/owl-s500-sparky.dts | 7 ------- 3 files changed, 21 deletions(-) -- 2.17.1 diff --git a/arch/arm/boot/dts/owl-s500-cubieboard6.dts b/arch/arm/boot/dts/owl-s500-cubieboard6.dts index 7c96c59b610d..c2b02895910c 100644 --- a/arch/arm/boot/dts/owl-s500-cubieboard6.dts +++ b/arch/arm/boot/dts/owl-s500-cubieboard6.dts @@ -25,12 +25,6 @@ device_type = "memory"; reg = <0x0 0x80000000>; }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -39,5 +33,4 @@ &uart3 { status = "okay"; - clocks = <&uart3_clk>; }; diff --git a/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts b/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts index e610d49395d2..7ae34a23e320 100644 --- a/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts +++ b/arch/arm/boot/dts/owl-s500-guitar-bb-rev-b.dts @@ -18,15 +18,8 @@ chosen { stdout-path = "serial3:115200n8"; }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &uart3 { status = "okay"; - clocks = <&uart3_clk>; }; diff --git a/arch/arm/boot/dts/owl-s500-sparky.dts b/arch/arm/boot/dts/owl-s500-sparky.dts index c665ce8b88b4..9d8f7336bec0 100644 --- a/arch/arm/boot/dts/owl-s500-sparky.dts +++ b/arch/arm/boot/dts/owl-s500-sparky.dts @@ -25,12 +25,6 @@ device_type = "memory"; reg = <0x0 0x40000000>; /* 1 or 2 GiB */ }; - - uart3_clk: uart3-clk { - compatible = "fixed-clock"; - clock-frequency = <921600>; - #clock-cells = <0>; - }; }; &timer { @@ -39,5 +33,4 @@ &uart3 { status = "okay"; - clocks = <&uart3_clk>; };