From patchwork Wed Jun 5 16:34:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 165923 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp7583124ili; Wed, 5 Jun 2019 09:34:42 -0700 (PDT) X-Google-Smtp-Source: APXvYqzQWDy+hBpVv469t2iLBdXw+Dl/i4sJgzx7kCI87Ttex1aPq7b7+o0m4QNLfQAYO4FpJsj7 X-Received: by 2002:a63:360c:: with SMTP id d12mr5558098pga.285.1559752481849; Wed, 05 Jun 2019 09:34:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1559752481; cv=none; d=google.com; s=arc-20160816; b=eAk6+aDAv0XVbdPOwPDAJ082aOJ5TOtBBuEfrvVRWB69a/O6zTDbP0Gwcklq6OOGie J43CYtdHH9/azxHhBvSOl6L/JKQm9GRSMDSCCKjtIelqny5h4YbSNBQY6e5iakmQnGs/ RHNHDhYgm6nh4MGyy3/Ami6imNPxPbVOhUUPhlvlRokILsn45KZnbxI1gCzVBuiw/OAp 0jznsTVKtrjFULuEbfJNcR9VNoepY0hrXCnZzCRDsbUMRRgoogUBognv8xvkcAc/oVsF zRzYHjRcdbrwGuLcU6W5PTHWmaz7H2VYcyq6m8wFZfhF3XKWtS2dBMPTa+ZIdV8/4Z3e jbxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8ACagW3EYCwLoCoiktlVl2qTdzviu48vaHSxM1Pmbnc=; b=N+QfD5g7gmocDQRmRhQBnBwiLhVLZuPB8TaaUh/m2AeWpEWteeUa4/1Z21hvP4VqMv UgGQgrNC9/0eMVFC3WkKsEbny89ZzcfZKDQ2xIRAh11qXNd5+373EN30Vp44jVbAsX9Q tswmNuimVVIt4IFseim2dFaUdjrjUW5lhbgb5hSh9XzBUjnpMt5dBpSqzZKGqx9P6xAU yAUm5u/wu4b8780F8smWA9jclyTBRIP/4+sSL7Wik1VVGbBu/yf1njUA5PzIVjUwml+s tINkjQTkLEnlnCSMwKDO8rIK9+I8laCJ1Qrm3rXTwu0KOXmBRKLT1X2+gCACVdeH2UZG nvdg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=udeKRnTg; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d65si26299964pgc.330.2019.06.05.09.34.41; Wed, 05 Jun 2019 09:34:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=udeKRnTg; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728591AbfFEQek (ORCPT + 8 others); Wed, 5 Jun 2019 12:34:40 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:57872 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728523AbfFEQek (ORCPT ); Wed, 5 Jun 2019 12:34:40 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id x55GYakN130367; Wed, 5 Jun 2019 11:34:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1559752476; bh=8ACagW3EYCwLoCoiktlVl2qTdzviu48vaHSxM1Pmbnc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=udeKRnTgj9dLbmxYbBFxzhKSkU1PfhkR47q/bMfz1VootkELMzfPd9pMGoroUqVws gvTiDz2Y4RAz5T68eXB4ccVS2JRefDEPtNt+erXXbj9YGEzMAIrxXdj0Y0Mpq265bm 84raIdQ9c3st/Kwr5NfTUhYTZ7RrZgG475MA3G6E= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x55GYaTs010422 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 5 Jun 2019 11:34:36 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Wed, 5 Jun 2019 11:34:36 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Wed, 5 Jun 2019 11:34:36 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id x55GYaEd023935; Wed, 5 Jun 2019 11:34:36 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id x55GYam10222; Wed, 5 Jun 2019 11:34:36 -0500 (CDT) From: Suman Anna To: Tero Kristo , Nishanth Menon CC: , , Suman Anna Subject: [PATCH 4/4] arm64: dts: ti: k3-am65: Add R5F ranges in interconnect nodes Date: Wed, 5 Jun 2019 11:34:34 -0500 Message-ID: <20190605163434.23173-5-s-anna@ti.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190605163434.23173-1-s-anna@ti.com> References: <20190605163434.23173-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the address spaces for the R5F cores in MCU domain to the ranges property of the cbass_mcu interconnect node so that the addresses within the R5F nodes can be translated properly by the relevant OF address API. Signed-off-by: Suman Anna --- arch/arm64/boot/dts/ti/k3-am65.dtsi | 4 ++++ 1 file changed, 4 insertions(+) -- 2.21.0 diff --git a/arch/arm64/boot/dts/ti/k3-am65.dtsi b/arch/arm64/boot/dts/ti/k3-am65.dtsi index abb085f5e784..f71c8f50a5e0 100644 --- a/arch/arm64/boot/dts/ti/k3-am65.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65.dtsi @@ -72,6 +72,8 @@ /* MCUSS Range */ <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>, <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, @@ -84,6 +86,8 @@ #size-cells = <2>; ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS*/ <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>, /* First peripheral window */ + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */ + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */ <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>, /* MCU SRAM */ <0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */ <0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */