From patchwork Tue Mar 17 13:57:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Foss X-Patchwork-Id: 203195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A65B5C4CECE for ; Tue, 17 Mar 2020 13:58:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 747E520768 for ; Tue, 17 Mar 2020 13:58:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="DkrVPzpl" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726893AbgCQN6A (ORCPT ); Tue, 17 Mar 2020 09:58:00 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:34537 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726881AbgCQN6A (ORCPT ); Tue, 17 Mar 2020 09:58:00 -0400 Received: by mail-wr1-f65.google.com with SMTP id z15so25776804wrl.1 for ; Tue, 17 Mar 2020 06:57:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=P7JWYlQFOyaIAqFimJQdd3iup5cldci6xVNIOsyL+ig=; b=DkrVPzplGIFqI1KZ37EycR6ESmT/LNzkFMGDFOMn/OnwpJEXmG0EmKr32eK7hXxSZb mA4bmfIyrbsqWUZZ7kMPIHFs1B+gO5rGolWSV9ZOFZsgf5F0roACfvkVsDZPbI8TE5ha Z7Pvw3a7ymEKkzo5h3Zhjc9rJCgIYjCE5h1NVDeFm/VlBAvsm0ZU6+TcbH4T007grxMu EIdOKC74JhxQlCo+SvY/OTNTUbAPBV8PkPIT1CE/prTzyjPVBGEte7w1lcbp/R5COhcH JWo0/xyedB0AKlBUTxtWqhE51PWtEsTZ0P0DPGvBDY/aaJ8Wzu1FOgHbabq3QdZN4855 O/Fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=P7JWYlQFOyaIAqFimJQdd3iup5cldci6xVNIOsyL+ig=; b=Wab7rQOaNk29Cf5OD7un6Hi1lB2z/29CEnfS7rO+V1LxkELaMQvgYEr5f2Rm0UDSer M96eS2UpaAqEuvwrVt8ItP419ou4QWl3EaFhf8B4oQbqIY2LYAnl4VMIHAKHLawAGo16 0hpqZRBP7VyaSGfAK1Xn6IFKgd3/1xF8cvyL2VDyWAVGtjd34AYBXd8cispIYGk9liWM uz0pFzwSVKfWr4/R+tRFYsJeUIUaBwPgyR3tiAwWCwZB2qfp6zZSwDRzxll/Bbq8U7Id GZORt9KW4cCYDUwAXO7My5sYvjO2jRAW6Yz5NkiSPmDnyAG0+iBMkJDhWkYJ8XtnMFZ9 8oCw== X-Gm-Message-State: ANhLgQ2Ue3q9H+TAe2kLT8LxPma4FsE/tlNSUS2mMBGk33kzL1WDTY0x hzCml0q8TbkVKLAj6xIEwRCfHkhaamo= X-Google-Smtp-Source: ADFU+vu9m0t1DCicP1GTwumQmJ9huzPALP6oJdGi5YmGxycbGIVjWGjkdF6jw6wXTtzlLzrlnUgLUg== X-Received: by 2002:adf:b1d2:: with SMTP id r18mr5984662wra.86.1584453477959; Tue, 17 Mar 2020 06:57:57 -0700 (PDT) Received: from xps7590.local ([2a02:2450:102f:13b8:84f7:5c25:a9d8:81a1]) by smtp.gmail.com with ESMTPSA id r3sm2976558wrn.35.2020.03.17.06.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Mar 2020 06:57:57 -0700 (PDT) From: Robert Foss To: agross@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com, will@kernel.org, shawnguo@kernel.org, olof@lixom.net, maxime@cerno.tech, Anson.Huang@nxp.com, dinguyen@kernel.org, leonard.crestez@nxp.com, marcin.juszkiewicz@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Loic Poulain Cc: Robert Foss Subject: [v2 5/6] arm64: dts: sdm845-db845c: Add ov8856 & ov7251 camera nodes Date: Tue, 17 Mar 2020 14:57:39 +0100 Message-Id: <20200317135740.19412-6-robert.foss@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317135740.19412-1-robert.foss@linaro.org> References: <20200317135740.19412-1-robert.foss@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Enable the ov8856 main camera and the ov7251 b/w tracking camera used on the Qualcomm RB3 kit. Currently the camera nodes have not yet been attached to an to a CSI2 endpoint, since no driver currently supports the ISP that the the SDM845/db845c ships with. Signed-off-by: Robert Foss Reviewed-by: Bjorn Andersson --- Changes since v1: - Move cam0_ pinctrls subnodes into the first pm8998_gpio reference - Remove accidentally committed &tlmn node subnodes - Remove redundant tlmm pinctrl subnodes - Fix pinctrl subnode identation - Remove accidentally committed &tlmn node subnodes - Replace underscores in node names - Reference cci i2c buses by labe - Change camera node names from camX@YY to camera@YY - Remove camera@10 comment about I2C addresses - Replace GPIO_ACTIVE_HIGH with 0 in camera nodes - Removed extra newline - Remove comment about not being available always - Disable cameras as CSI driver is missing - Fix factual error in comment about vreg_s4a_1p8 - Remove dummy regulator cam3_vddd_1v2 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 178 +++++++++++++++++++++ 1 file changed, 178 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index efb0086e2aa1..ed71278196f2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -110,6 +110,40 @@ // enable-active-high; }; + cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { + compatible = "regulator-fixed"; + regulator-name = "CAM0_DVDD_1V2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + enable-active-high; + gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_dvdd_1v2_en_default>; + vin-supply = <&vbat>; + }; + + cam0_avdd_2v8: reg_cam0_avdd_2v8 { + compatible = "regulator-fixed"; + regulator-name = "CAM0_AVDD_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + enable-active-high; + gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_avdd_2v8_en_default>; + vin-supply = <&vbat>; + }; + + /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ + cam3_avdd_2v8: reg_cam3_avdd_2v8 { + compatible = "regulator-fixed"; + regulator-name = "CAM3_AVDD_2V8"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-always-on; + vin-supply = <&vbat>; + }; + pcie0_3p3v_dual: vldo-3v3-regulator { compatible = "regulator-fixed"; regulator-name = "VLDO_3V3"; @@ -393,6 +427,24 @@ "OPTION2", "PM845_SLB"; + cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { + pins = "gpio12"; + function = "normal"; + + bias-pull-up; + drive-push-pull; + qcom,drive-strength = ; + }; + + cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { + pins = "gpio10"; + function = "normal"; + + bias-pull-up; + drive-push-pull; + qcom,drive-strength = ; + }; + vol_up_pin_a: vol-up-active { pins = "gpio6"; function = "normal"; @@ -434,6 +486,42 @@ }; &tlmm { + cam0_default: cam0_default { + rst { + pins = "gpio9"; + function = "gpio"; + + drive-strength = <16>; + bias-disable; + }; + + mclk0 { + pins = "gpio13"; + function = "cam_mclk"; + + drive-strength = <16>; + bias-disable; + }; + }; + + cam3_default: cam3_default { + rst { + function = "gpio"; + pins = "gpio21"; + + drive-strength = <16>; + bias-disable; + }; + + mclk3 { + function = "cam_mclk"; + pins = "gpio16"; + + drive-strength = <16>; + bias-disable; + }; + }; + pcie0_pwren_state: pcie0-pwren { pins = "gpio90"; function = "gpio"; @@ -612,6 +700,96 @@ }; }; +&pm8998_gpio { + +}; + &cci { status = "ok"; }; + +&cci_i2c0 { + camera@10 { + compatible = "ovti,ov8856"; + reg = <0x10>; + + // CAM0_RST_N + reset-gpios = <&tlmm 9 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam0_default>; + gpios = <&tlmm 13 0>, + <&tlmm 9 0>; + + clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; + clock-names = "xvclk"; + clock-frequency = <19200000>; + + /* The &vreg_s4a_1p8 trace is powered on as a, + * so it is represented by a fixed regulator. + * + * The 2.8V vdda-supply and 1.2V vddd-supply regulators + * both have to be enabled through the power management + * gpios. + */ + power-domains = <&clock_camcc TITAN_TOP_GDSC>; + + dovdd-supply = <&vreg_lvs1a_1p8>; + avdd-supply = <&cam0_avdd_2v8>; + dvdd-supply = <&cam0_dvdd_1v2>; + + status = "disable"; + + port { + ov8856_ep: endpoint { + clock-lanes = <1>; + link-frequencies = /bits/ 64 + <360000000 180000000>; + data-lanes = <1 2 3 4>; +// remote-endpoint = <&csiphy0_ep>; + }; + }; + }; +}; + +&cci_i2c1 { + camera@60 { + compatible = "ovti,ov7251"; + + // I2C address as per ov7251.txt linux documentation + reg = <0x60>; + + // CAM3_RST_N + enable-gpios = <&tlmm 21 0>; + pinctrl-names = "default"; + pinctrl-0 = <&cam3_default>; + gpios = <&tlmm 16 0>, + <&tlmm 21 0>; + + clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; + clock-names = "xclk"; + clock-frequency = <24000000>; + + /* The &vreg_s4a_1p8 trace always powered on. + * + * The 2.8V vdda-supply regulator is enabled when the + * vreg_s4a_1p8 trace is pulled high. + * It too is represented by a fixed regulator. + * + * No 1.2V vddd-supply regulator is used. + */ + power-domains = <&clock_camcc TITAN_TOP_GDSC>; + + vdddo-supply = <&vreg_lvs1a_1p8>; + vdda-supply = <&cam3_avdd_2v8>; + + status = "disable"; + + port { + ov7251_ep: endpoint { + clock-lanes = <1>; + data-lanes = <0 1>; +// remote-endpoint = <&csiphy3_ep>; + }; + }; + }; +};