@@ -19,12 +19,12 @@ Required properties:
- "pcie_phy"
Optional properties:
-- fsl,tx-deemph-gen1: Gen1 De-emphasis value. Default: 0
-- fsl,tx-deemph-gen2-3p5db: Gen2 (3.5db) De-emphasis value. Default: 0
-- fsl,tx-deemph-gen2-6db: Gen2 (6db) De-emphasis value. Default: 20
-- fsl,tx-swing-full: Gen2 TX SWING FULL value. Default: 127
-- fsl,tx-swing-low: TX launch amplitude swing_low value. Default: 127
-- fsl,max-link-speed: Specify PCI gen for link capability. Must be '2' for
+- tx-deemph-gen1: Gen1 De-emphasis value. Default: 0
+- tx-deemph-gen2-3p5db: Gen2 (3.5db) De-emphasis value. Default: 0
+- tx-deemph-gen2-6db: Gen2 (6db) De-emphasis value. Default: 20
+- tx-swing-full: Gen2 TX SWING FULL value. Default: 127
+- tx-swing-low: TX launch amplitude swing_low value. Default: 127
+- max-link-speed: Specify PCI gen for link capability. Must be '2' for
gen2, otherwise will default to gen1. Note that the IMX6 LVDS clock outputs
do not meet gen2 jitter requirements and thus for gen2 capability a gen2
compliant clock generator should be used and configured.
TX Deemph and TX Swing are now defined in pci.txt, rename them to follow the new name. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- .../devicetree/bindings/pci/fsl,imx6q-pcie.txt | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)