From patchwork Fri May 8 08:29:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Quadros X-Patchwork-Id: 200902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 527D8C38A2A for ; Fri, 8 May 2020 08:30:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F214620870 for ; Fri, 8 May 2020 08:30:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="eaZdqxQb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727117AbgEHI35 (ORCPT ); Fri, 8 May 2020 04:29:57 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:48688 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727107AbgEHI34 (ORCPT ); Fri, 8 May 2020 04:29:56 -0400 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 0488Ts7o090811; Fri, 8 May 2020 03:29:54 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1588926594; bh=1g6iciYwZWDHsW6Ht8mzKa5bSM5PIok+We1fcGhtkBU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=eaZdqxQbykgicsIf6Gwgv+1LXHr3J8XP+hT6+P+GWwLCmD79puuPL2bUZcsOPs76R LPM0oJSH9/8zLYFfoEs/x6DXwyhesaQ5czoDZ4ZUZ5zHVVOwD2QaZxx1TKjulQm2q7 xy3C1pY6rdsAo81R6rVkU3Yc5hNWqXDVqNlca2Yc= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 0488TsKe063640 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 8 May 2020 03:29:54 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Fri, 8 May 2020 03:29:54 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Fri, 8 May 2020 03:29:54 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 0488TdnE073953; Fri, 8 May 2020 03:29:52 -0500 From: Roger Quadros To: CC: , , , , , , , Roger Quadros Subject: [PATCH v3 5/7] arm64: dts: ti: k3-j721e-main.dtsi: Add USB to SERDES MUX Date: Fri, 8 May 2020 11:29:35 +0300 Message-ID: <20200508082937.14171-6-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200508082937.14171-1-rogerq@ti.com> References: <20200508082937.14171-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The USB controllers can be connected to one of the 2 SERDESes using a MUX. Add a MUX controller node fot that. Signed-off-by: Roger Quadros Signed-off-by: Sekhar Nori --- arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index b8b68951771b..17c859d66894 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -44,6 +44,13 @@ , , , , , ; }; + + usb_serdes_mux: mux-controller@4000 { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x4000 0x8000000>, /* USB0 to SERDES0/3 mux */ + <0x4010 0x8000000>; /* USB1 to SERDES1/2 mux */ + }; }; gic500: interrupt-controller@1800000 {