From patchwork Sun Sep 27 06:21:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhen Lei X-Patchwork-Id: 313599 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp2398427ilg; Sat, 26 Sep 2020 23:28:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxwxGIgglU3ItBuSBbMYZckEo/180bn5rc34r24/QA0IUqrcfOMmjQBl3DGskp4MWrO7bL8 X-Received: by 2002:a17:906:8508:: with SMTP id i8mr10469076ejx.390.1601188107294; Sat, 26 Sep 2020 23:28:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601188107; cv=none; d=google.com; s=arc-20160816; b=RsWldeB6NSHjwZl8h6jyMEPDkr4+w6vApG6AbUrCyIqTe7oCBd5KeaXm6Qbl43JUPQ dEhSBV+KMBe2qnh7jPMP+52EHSBLbx5lAOBZ/EM19Wi3/JmXofVfsD3nBmJdFtxX9CJ+ 7zCxkkBEzzg1SvC4FVmpb07XA8quAPIC11xElyQn7dHGNhdgvd4xWpd1FZDO4ec55ZVJ sEKPT6D/3YizsAq+yf54prwvzMtXyrK8ww1jdFOhs9bpQ69wGKxnhZQ2fi7ld//0eL+j UZd7UQe4IK+VUleWohPFUrIzgDnHUHHpJi26oaCrUIArICBhjE8QcLLquPMSn74ofBX+ 2p2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=bSh9V39hYNs1gXrXSKPLApib7S20dJbG+b/5eYHSR0o=; b=pg77cuw+PgqycCkCYepYt5AVH7cCMQlKV8lx2k+P8sHIAaOIurvO9xmqG4UICQbTXI vtSicVmtur23wvJUkckGwkgwOspxxSF8khkYCOYm+kKa8IFnaGYhOoiJ25WVlHHlOia6 1eaD7MAMt3kJQwhYRMmk5EzkifayMJLa8j3etcaQlWIXo5DxO1/5Yk6Q+ln4DNQD2siT eemawQhN7R5MZ01Ekpb6a4gs4Vcxv0k83LM2S6WEHQfg58xBZ7N91h9AxQ042WElEv2a ILJQfofjMF/G9u2R/mQBs4A9vilC6z5eCj/lcP5PNQRhXgEfpMtx/9tErYqw2aId9dRo f18Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id qt16si4926110ejb.352.2020.09.26.23.28.27; Sat, 26 Sep 2020 23:28:27 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730361AbgI0G04 (ORCPT + 6 others); Sun, 27 Sep 2020 02:26:56 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14287 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729713AbgI0G0z (ORCPT ); Sun, 27 Sep 2020 02:26:55 -0400 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id A0CF8F58B3A948F004C5; Sun, 27 Sep 2020 14:26:52 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.487.0; Sun, 27 Sep 2020 14:26:46 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v3 10/21] dt-bindings: arm: hisilicon: convert hisilicon, pcie-sas-subctrl bindings to json-schema Date: Sun, 27 Sep 2020 14:21:18 +0800 Message-ID: <20200927062129.4573-11-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200927062129.4573-1-thunder.leizhen@huawei.com> References: <20200927062129.4573-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the Hisilicon HiP05/HiP06 PCIe-SAS subsystem controller binding to DT schema format using json-schema. Signed-off-by: Zhen Lei --- .../controller/hisilicon,pcie-sas-subctrl.txt | 15 --------- .../controller/hisilicon,pcie-sas-subctrl.yaml | 37 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml -- 1.8.3 diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt deleted file mode 100644 index 43efdaf408f6fe1..000000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.txt +++ /dev/null @@ -1,15 +0,0 @@ -Hisilicon HiP05/HiP06 PCIe-SAS sub system controller - -Required properties: -- compatible : "hisilicon,pcie-sas-subctrl", "syscon"; -- reg : Register address and size - -The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 PCIe-SAS sub system */ - pcie_sas: system_controller@b0000000 { - compatible = "hisilicon,pcie-sas-subctrl", "syscon"; - reg = <0xb0000000 0x10000>; - }; \ No newline at end of file diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml new file mode 100644 index 000000000000000..8d1341022de587d --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hisilicon,pcie-sas-subctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon HiP05/HiP06 PCIe-SAS subsystem controller + +maintainers: + - Wei Xu + +description: | + The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in + HiP05 or HiP06 Soc to implement some basic configurations. + +properties: + compatible: + items: + - const: hisilicon,pcie-sas-subctrl + - const: syscon + + reg: + description: Register address and size + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + /* for HiP05 PCIe-SAS sub system */ + pcie_sas: system_controller@b0000000 { + compatible = "hisilicon,pcie-sas-subctrl", "syscon"; + reg = <0xb0000000 0x10000>; + }; +... \ No newline at end of file