From patchwork Mon Sep 28 15:13:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313651 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp3392967ilg; Mon, 28 Sep 2020 08:17:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwPOTyn3NS1pHlcImfbyvNKDAS4utP/J0adXG4EO8xLzzvSdFd8uXtKcCG683eYIpIm7/iS X-Received: by 2002:a17:906:8c1:: with SMTP id o1mr2209748eje.478.1601306245256; Mon, 28 Sep 2020 08:17:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601306245; cv=none; d=google.com; s=arc-20160816; b=UWMe2oP+hPFt07Efqoa5sOeyba5bUbe6la8RrURE27HYD4aJYUxeO9IuHkrDytxENm X0JNEg3cKOi7wLDpqMWriw5kiOzD0XW5cy7IEboToN+xFJ+iA0MAbwlctkFRodxV7x5u rNhIoe4u9r//sTNT/yh9l2b4Q8YTsBSAHTK9IFG52cunPCa+yU/npIQIn/5xFmj7zt3F mwvTnGgTYBMHCVeDbaEMDgpqv8KNxnfQBaAoXV4msv+N7mF0MYlb9hTtFhRxRr055yDs k4rl8/+gxQ0w6fd8yeW9CWwCeoKaeZ/PZgT5u4VFVB/6WbpWXRdk2vs2jOaTa+B0AWTI HLUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7S2NxD+MhlhEdXZBEzBKVlIncr3e0pL4ulB33Jw88Vg=; b=fMhCWD1xyH/ek79BsSGBqPkEcEPpLB0MdwBbEDDHWhWDQpYwA5hsl/a2S7xxILiaaO 6MCABUkufrwfCKzztklSDhl+TVoQbZ9Gcbk7eGDN7qjxvO8/uGwdoYjtqV9ANxLHJaCS uYCIBOxZUn0W1KKEn2Dju9zDzCinSY5Ebf3VbScL7XtKY+QiE/O6Q8m0XpLALrZLs749 CYkUu/5pQbfXQlZT1FNer8LuorTgU9EXjyjA2CjIm6OnlJ3WL6nZDlSKRGaAjzk6z9Ge KAonTmtl87lL5aXFXWiUqsXQGAdFKPPa8lsk4JRq1KHVGchoWyqny23OIZsE2YUVE4Bz WZiQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id k19si859451ejg.563.2020.09.28.08.17.25; Mon, 28 Sep 2020 08:17:25 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726466AbgI1PRY (ORCPT + 6 others); Mon, 28 Sep 2020 11:17:24 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:14318 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726461AbgI1PRY (ORCPT ); Mon, 28 Sep 2020 11:17:24 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id A32B21FF84AB1D6B345B; Mon, 28 Sep 2020 23:17:19 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.487.0; Mon, 28 Sep 2020 23:17:11 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , "Jonathan Cameron" , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v4 04/20] ARM: hisi: add support for SD5203 SoC Date: Mon, 28 Sep 2020 23:13:08 +0800 Message-ID: <20200928151324.2134-5-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200928151324.2134-1-thunder.leizhen@huawei.com> References: <20200928151324.2134-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kefeng Wang Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S. Signed-off-by: Kefeng Wang Signed-off-by: Zhen Lei --- arch/arm/mach-hisi/Kconfig | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index 3b010fe7c0e9b48..2e980f834a6aa1b 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config ARCH_HISI bool "Hisilicon SoC Support" - depends on ARCH_MULTI_V7 + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5 select ARM_AMBA - select ARM_GIC + select ARM_GIC if ARCH_MULTI_V7 select ARM_TIMER_SP804 select POWER_RESET select POWER_RESET_HISI @@ -15,6 +15,7 @@ menu "Hisilicon platform type" config ARCH_HI3xxx bool "Hisilicon Hi36xx family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -25,6 +26,7 @@ config ARCH_HI3xxx config ARCH_HIP01 bool "Hisilicon HIP01 family" + depends on ARCH_MULTI_V7 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select ARM_GLOBAL_TIMER @@ -33,6 +35,7 @@ config ARCH_HIP01 config ARCH_HIP04 bool "Hisilicon HiP04 Cortex A15 family" + depends on ARCH_MULTI_V7 select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select MCPM if SMP @@ -43,6 +46,7 @@ config ARCH_HIP04 config ARCH_HIX5HD2 bool "Hisilicon X5HD2 family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -50,6 +54,14 @@ config ARCH_HIX5HD2 select PINCTRL_SINGLE help Support for Hisilicon HIX5HD2 SoC family + +config ARCH_SD5203 + bool "Hisilicon SD5203 family" + depends on ARCH_MULTI_V5 + select DW_APB_ICTL + help + Support for Hisilicon SD5203 SoC family + endmenu endif