From patchwork Tue Sep 29 14:14:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 313765 Delivered-To: patch@linaro.org Received: by 2002:a92:5ad1:0:0:0:0:0 with SMTP id b78csp4206611ilg; Tue, 29 Sep 2020 07:16:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw+OdLCpUy4NZHTbqGBoRHj2WPbpyGAY+q6oXBQjr2yGyhd/IHcUX5osxeZIDhii5cu5kuk X-Received: by 2002:a17:906:1b11:: with SMTP id o17mr4313703ejg.67.1601388963033; Tue, 29 Sep 2020 07:16:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1601388963; cv=none; d=google.com; s=arc-20160816; b=pDU+60LatXrTwlrpqgNSVmaVEV4pUXp6RBwyK1hudM4KRj6vUY7yKy/1wu6C7V9XG7 OnZNbYAonMmKxol6LdzUQIp0My08OgMzAWS5OmRf0aRFuKkBi5eRdhSZdzCU/WaIrP8E aXjoJ5JdW8OmvbDKuv2eqCGUyoxtS8KQxB379VztWIGJLanpQN8pj/EPqoe5s2YW0C/t 6lxmjsLgYP2hzzb+mqLSysJAo6cXF9wVTg0Eut7LxSfXORZplyH8z64Hm0r1fMT7qly0 7cULtTppp82n4LOUGvCVeLRSdmxWVqfhfWZ/KsYJ9ku0i7Wp7QQ5mBE7ZijytzS2SL3Y BQWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7S2NxD+MhlhEdXZBEzBKVlIncr3e0pL4ulB33Jw88Vg=; b=m9J8kn+DkTYDJgq4Plm0uSomY3EJSHq1c9x/z7cOJHjNpum9lPqa9E2tp3QaGlDqLd OOeECBHqUoOXTq3V+Lw/uHsIX3TgEL1NxIghlCh1Q59wYcdHRjHdkhF12dTBJm8dV3X4 5Lpb+cRQ9s8yWH3Fa88xOLp92hb4fuwvuH2jPzitZRgwWanYnq5aR+e3Y7d+/Iq8DHFL RMCy2LmPirBLLEZnRlcitFr7Da9yt86PZSkB3pKmFU7ABsWTEwgCAoejScer5p+gzrFS LjQW2zCQm7UHY5ZLmS3klHpPUCHVWWf3hhAVMp2UhkvL1PlStEx0xL91W36FxW2SuOHE RZag== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p26si2775529ejf.86.2020.09.29.07.16.02; Tue, 29 Sep 2020 07:16:03 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731002AbgI2OP5 (ORCPT + 6 others); Tue, 29 Sep 2020 10:15:57 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:14719 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730810AbgI2OPm (ORCPT ); Tue, 29 Sep 2020 10:15:42 -0400 Received: from DGGEMS414-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 8B818BA33B7AD039D4F4; Tue, 29 Sep 2020 22:15:24 +0800 (CST) Received: from thunder-town.china.huawei.com (10.174.177.253) by DGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP Server id 14.3.487.0; Tue, 29 Sep 2020 22:15:14 +0800 From: Zhen Lei To: Wei Xu , Rob Herring , "Jonathan Cameron" , devicetree , linux-arm-kernel , linux-kernel CC: Zhen Lei , Libin , Kefeng Wang Subject: [PATCH v5 06/17] ARM: hisi: add support for SD5203 SoC Date: Tue, 29 Sep 2020 22:14:43 +0800 Message-ID: <20200929141454.2312-7-thunder.leizhen@huawei.com> X-Mailer: git-send-email 2.26.0.windows.1 In-Reply-To: <20200929141454.2312-1-thunder.leizhen@huawei.com> References: <20200929141454.2312-1-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.177.253] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Kefeng Wang Enable support for the Hisilicon SD5203 SoC. The core is ARM926EJ-S. Signed-off-by: Kefeng Wang Signed-off-by: Zhen Lei --- arch/arm/mach-hisi/Kconfig | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/arch/arm/mach-hisi/Kconfig b/arch/arm/mach-hisi/Kconfig index 3b010fe7c0e9b48..2e980f834a6aa1b 100644 --- a/arch/arm/mach-hisi/Kconfig +++ b/arch/arm/mach-hisi/Kconfig @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-only config ARCH_HISI bool "Hisilicon SoC Support" - depends on ARCH_MULTI_V7 + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5 select ARM_AMBA - select ARM_GIC + select ARM_GIC if ARCH_MULTI_V7 select ARM_TIMER_SP804 select POWER_RESET select POWER_RESET_HISI @@ -15,6 +15,7 @@ menu "Hisilicon platform type" config ARCH_HI3xxx bool "Hisilicon Hi36xx family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -25,6 +26,7 @@ config ARCH_HI3xxx config ARCH_HIP01 bool "Hisilicon HIP01 family" + depends on ARCH_MULTI_V7 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP select ARM_GLOBAL_TIMER @@ -33,6 +35,7 @@ config ARCH_HIP01 config ARCH_HIP04 bool "Hisilicon HiP04 Cortex A15 family" + depends on ARCH_MULTI_V7 select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER select MCPM if SMP @@ -43,6 +46,7 @@ config ARCH_HIP04 config ARCH_HIX5HD2 bool "Hisilicon X5HD2 family" + depends on ARCH_MULTI_V7 select CACHE_L2X0 select HAVE_ARM_SCU if SMP select HAVE_ARM_TWD if SMP @@ -50,6 +54,14 @@ config ARCH_HIX5HD2 select PINCTRL_SINGLE help Support for Hisilicon HIX5HD2 SoC family + +config ARCH_SD5203 + bool "Hisilicon SD5203 family" + depends on ARCH_MULTI_V5 + select DW_APB_ICTL + help + Support for Hisilicon SD5203 SoC family + endmenu endif