Message ID | 20201027170033.8475-2-manivannan.sadhasivam@linaro.org |
---|---|
State | New |
Headers | show |
Series | Add PCIe support for SM8250 SoC | expand |
On 27-10-20, 22:30, Manivannan Sadhasivam wrote: > Add the below three PCIe PHYs found in SM8250 to the QMP binding: > > QMP GEN3x1 PHY - 1 lane > QMP GEN3x2 PHY - 2 lanes > QMP Modem PHY - 2 lanes > Applied, thanks -- ~Vinod
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml index 185cdea9cf81..ec05db374645 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml @@ -31,6 +31,9 @@ properties: - qcom,sdm845-qmp-usb3-uni-phy - qcom,sm8150-qmp-ufs-phy - qcom,sm8250-qmp-ufs-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy reg: items: @@ -259,6 +262,9 @@ allOf: enum: - qcom,sdm845-qhp-pcie-phy - qcom,sdm845-qmp-pcie-phy + - qcom,sm8250-qmp-gen3x1-pcie-phy + - qcom,sm8250-qmp-gen3x2-pcie-phy + - qcom,sm8250-qmp-modem-pcie-phy then: properties: clocks: